[PATCH] D61692: [SDAG] Vector op legalization for overflow ops

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp:423
   case ISD::UMAX:
   case ISD::SMUL_LOHI:
   case ISD::UMUL_LOHI:
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It's interesting that we even pretend to handle SMUL_LOHI/UMUL_LOHI/SDIVREM/UDIVREM in this file. They aren't explicitly handled in Expand and will fall back to UnrollVectorOp which doesn't support multiple results. But I suspect we never create vector versions of theses nodes if they aren't marked Legal/Custom.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D61692/new/

https://reviews.llvm.org/D61692