[PATCH] D58632: [X86] Improve lowering of idemptotent RMW operations
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 8 11:18:58 PDT 2019
craig.topper added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:25999
+ Chain};
+ SDNode *Res = DAG.getMachineNode(X86::LOCK_OR64mi32, DL, MVT::Other, Ops);
+ return SDValue(Res, 0);
----------------
reames wrote:
> craig.topper wrote:
> > Shouldn't this be mi8 for a shorter encoding?
> >
> > Does 64-bit really need a 64-bit access or can we just use a 32-bit access?
>
> For the 64 bit, we need a valid stack location. There's no guarantee that ESP will contain a valid address. (Since it's the 32 bit truncation of RSP and the stack may be outside the low 4 GB.)
Sorry. I meant can we use OR32mi8Locked in 64-bit mode, but still use RSP for the address ? The amount of stack space accessed isn't important right? We could read/write 4 bytes from the stack? I mainly ask because OR32mi8Locked is 1 byte shorter to encode than LOCK_OR64mi8 if none of the registers used force the use of a REX prefix.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D58632/new/
https://reviews.llvm.org/D58632
More information about the llvm-commits
mailing list