[PATCH] D61624: [FastISel][X86] Support FNeg instruction in target independent fast isel handling

Phabricator via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 8 10:26:02 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rL360273: [FastISel][X86] Support FNeg instruction in target independent fast isel… (authored by ctopper, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D61624?vs=198380&id=198695#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61624/new/

https://reviews.llvm.org/D61624

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll


Index: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -1839,6 +1839,9 @@
   case Instruction::Xor:
     return selectBinaryOp(I, ISD::XOR);
 
+  case Instruction::FNeg:
+    return selectFNeg(I, I->getOperand(0));
+
   case Instruction::GetElementPtr:
     return selectGetElementPtr(I);
 
Index: llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
+++ llvm/trunk/test/CodeGen/X86/fast-isel-fneg.ll
@@ -99,3 +99,50 @@
   store float %b, float* %y
   ret void
 }
+
+define double @too(double %x) nounwind {
+; CHECK-LABEL: too:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    movq %xmm0, %rax
+; CHECK-NEXT:    movabsq $-9223372036854775808, %rcx ## imm = 0x8000000000000000
+; CHECK-NEXT:    xorq %rax, %rcx
+; CHECK-NEXT:    movq %rcx, %xmm0
+; CHECK-NEXT:    retq
+;
+; SSE2-LABEL: too:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    pushl %ebp
+; SSE2-NEXT:    movl %esp, %ebp
+; SSE2-NEXT:    andl $-8, %esp
+; SSE2-NEXT:    subl $8, %esp
+; SSE2-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; SSE2-NEXT:    xorps {{\.LCPI.*}}, %xmm0
+; SSE2-NEXT:    movlps %xmm0, (%esp)
+; SSE2-NEXT:    fldl (%esp)
+; SSE2-NEXT:    movl %ebp, %esp
+; SSE2-NEXT:    popl %ebp
+; SSE2-NEXT:    retl
+  %y = fneg double %x
+  ret double %y
+}
+
+define float @zoo(float %x) nounwind {
+; CHECK-LABEL: zoo:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    movd %xmm0, %eax
+; CHECK-NEXT:    xorl $2147483648, %eax ## imm = 0x80000000
+; CHECK-NEXT:    movd %eax, %xmm0
+; CHECK-NEXT:    retq
+;
+; SSE2-LABEL: zoo:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    pushl %eax
+; SSE2-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE2-NEXT:    xorps {{\.LCPI.*}}, %xmm0
+; SSE2-NEXT:    movss %xmm0, (%esp)
+; SSE2-NEXT:    flds (%esp)
+; SSE2-NEXT:    popl %eax
+; SSE2-NEXT:    retl
+  %y = fneg float %x
+  ret float %y
+}


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