[PATCH] D57348: [CodeGen][X86] Don't scalarize vector saturating add/sub

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 8 09:38:30 PDT 2019


aemerson added a comment.

Hi Nikita,

This commit seems to cause a crash running llc -O0 on the following IR:

  target triple = "thumbv7k-apple-darwin"                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     define hidden void @foo(<2 x i64> *%ptr) {                                                                                                                                                                                                                                                                                    entry:                                                                                                                                                                                                                                                                                                                          %0 = load <2 x i64>, <2 x i64>* %ptr, align 8                                                                                                                                                                                                                                                                                 %1 = call <2 x i64> @llvm.usub.sat.v2i64(<2 x i64> zeroinitializer, <2 x i64> %0)                                                                                                                                                                                                                                             %2 = bitcast i64* undef to <2 x i64>*                                                                                                                                                                                                                                                                                         store <2 x i64> %1, <2 x i64>* %2, align 8                                                                                                                                                                                                                                                                                    ret void                                                                                                                                                                                                                                                                                                                    }                                                                                                                                                                                                                                                                                                                             
                                                                                                                                                                                                                                                                                                                                ; Function Attrs: nounwind readnone speculatable                                                                                                                                                                                                                                                                              declare <2 x i64> @llvm.usub.sat.v2i64(<2 x i64>, <2 x i64>)

Could you take a look?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57348/new/

https://reviews.llvm.org/D57348





More information about the llvm-commits mailing list