[PATCH] D61610: [PPC64] implement Thunk Section Spacing

[Sean Fertile via Phabricator via llvm-commits]

sfertile added a comment.

Thanks for posting this  @adalava.



================
Comment at: lld/ELF/Arch/PPC64.cpp:931
+  // REL14 range
+  return 0x8000;
+}
----------------
MaskRay wrote:
> This probably should be slightly smaller than 0x8000.
> 
> @peter.smith probably has idea how the ARM/AArch64 constants were derived.
> 
> ```
> uint32_t AArch64::getThunkSectionSpacing() const {
>   // See comment in Arch/ARM.cpp for a more detailed explanation of
>   // getThunkSectionSpacing(). For AArch64 the only branches we are permitted to
>   // Thunk have a range of +/- 128 MiB
>   return (128 * 1024 * 1024) - 0x30000;
> }
> ```
The conditional branch instructions only encode a 14-bit immediate which gets shifted left 2 places to form a  4-byte aligned signed 16-bit offset. This gives us a range of [0x8000, 0x7ffc]. Since we have slightly less 'reach' with positive offsets we should start with a spacing of 0x7ffc instead of 0x8000.  Then I guess we want to make it slightly smaller so that a branch can reach more then just the first/last instruction in the thunk section.


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  https://reviews.llvm.org/D61610/new/

https://reviews.llvm.org/D61610