[llvm] r360022 - [X86] Move files to correct directories after D60552
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Mon May 6 02:24:36 PDT 2019
Author: maskray
Date: Mon May 6 02:24:36 2019
New Revision: 360022
URL: http://llvm.org/viewvc/llvm-project?rev=360022&view=rev
Log:
[X86] Move files to correct directories after D60552
Added:
llvm/trunk/test/CodeGen/avx512bf16-intrinsics.ll
llvm/trunk/test/CodeGen/avx512bf16-vl-intrinsics.ll
llvm/trunk/test/MC/Disassembler/X86/avx512bf16-att.txt
llvm/trunk/test/MC/Disassembler/X86/avx512bf16-intel.txt
llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-att.txt
llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-intel.txt
llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
llvm/trunk/test/MC/X86/avx512_bf16-encoding.s
llvm/trunk/test/MC/X86/avx512_bf16_vl-encoding.s
llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16.s
llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16_vl.s
llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s
llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s
llvm/trunk/test/MC/X86/x86-64-avx512_bf16-encoding.s
llvm/trunk/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s
Added: llvm/trunk/test/CodeGen/avx512bf16-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/avx512bf16-intrinsics.ll?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/avx512bf16-intrinsics.ll (added)
+++ llvm/trunk/test/CodeGen/avx512bf16-intrinsics.ll Mon May 6 02:24:36 2019
@@ -0,0 +1,160 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+
+declare <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float>, <16 x float>) #3
+
+define <8 x i64> @test_mm512_cvtne2ps2bf16_512(<16 x float> %A, <16 x float> %B) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm512_cvtne2ps2bf16_512:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7f,0x48,0x72,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
+ %1 = bitcast <32 x i16> %0 to <8 x i64>
+ ret <8 x i64> %1
+}
+
+define <8 x i64> @test_mm512_maskz_cvtne2ps2bf16_512(<16 x float> %A, <16 x float> %B, i32 %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_maskz_cvtne2ps2bf16_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x72,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_maskz_cvtne2ps2bf16_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x72,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
+ %1 = bitcast i32 %U to <32 x i1>
+ %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
+ %3 = bitcast <32 x i16> %2 to <8 x i64>
+ ret <8 x i64> %3
+}
+
+define <8 x i64> @test_mm512_mask_cvtne2ps2bf16_512(<8 x i64> %C, i32 %U, <16 x float> %A, <16 x float> %B) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_mask_cvtne2ps2bf16_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ps2bf16 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x72,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_mask_cvtne2ps2bf16_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x72,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
+ %1 = bitcast <8 x i64> %C to <32 x i16>
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i16> %0, <32 x i16> %1
+ %4 = bitcast <32 x i16> %3 to <8 x i64>
+ ret <8 x i64> %4
+}
+
+declare <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float>) #3
+
+define <4 x i64> @test_mm512_cvtneps2bf16_512(<16 x float> %A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm512_cvtneps2bf16_512:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtneps2bf16 %zmm0, %ymm0 # encoding: [0x62,0xf2,0x7e,0x48,0x72,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define <4 x i64> @test_mm512_maskz_cvtneps2bf16_512(<16 x float> %A, i16 %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_maskz_cvtneps2bf16_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw 4(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneps2bf16 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x72,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_maskz_cvtneps2bf16_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x72,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
+ %1 = bitcast i16 %U to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+define <4 x i64> @test_mm512_mask_cvtneps2bf16_512(<4 x i64> %C, i16 %U, <16 x float> %A) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_mask_cvtneps2bf16_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw 4(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneps2bf16 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x72,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_mask_cvtneps2bf16_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x72,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
+ %1 = bitcast <4 x i64> %C to <16 x i16>
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %0, <16 x i16> %1
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+declare <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float>, <16 x i32>, <16 x i32>) #3
+
+define <16 x float> @test_mm512_dpbf16ps_512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm512_dpbf16ps_512:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vdpbf16ps %zmm2, %zmm1, %zmm0 # encoding: [0x62,0xf2,0x76,0x48,0x52,0xc2]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
+ ret <16 x float> %0
+}
+
+define <16 x float> @test_mm512_maskz_dpbf16ps_512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B, i16 zeroext %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_maskz_dpbf16ps_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw 4(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xc9,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_maskz_dpbf16ps_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xc9,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
+ %1 = bitcast i16 %U to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer
+ ret <16 x float> %2
+}
+define <16 x float> @test_mm512_mask_dpbf16ps_512(i16 zeroext %U, <16 x float> %E, <16 x i32> %A, <16 x i32> %B) local_unnamed_addr #2 {
+; X86-LABEL: test_mm512_mask_dpbf16ps_512:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw 4(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x49,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm512_mask_dpbf16ps_512:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x49,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
+ %1 = bitcast i16 %U to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %E
+ ret <16 x float> %2
+}
Added: llvm/trunk/test/CodeGen/avx512bf16-vl-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/avx512bf16-vl-intrinsics.ll?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/avx512bf16-vl-intrinsics.ll (added)
+++ llvm/trunk/test/CodeGen/avx512bf16-vl-intrinsics.ll Mon May 6 02:24:36 2019
@@ -0,0 +1,358 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+
+declare <8 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float>, <4 x float>) #1
+
+define <2 x i64> @test_mm_cvtne2ps2bf16_128(<4 x float> %A, <4 x float> %B) local_unnamed_addr #0 {
+; CHECK-LABEL: test_mm_cvtne2ps2bf16_128:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtne2ps2bf16 %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7f,0x08,0x72,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #2
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define <2 x i64> @test_mm_maskz_cvtne2ps2bf16_128(<4 x float> %A, <4 x float> %B, i8 zeroext %U) local_unnamed_addr #0 {
+; X86-LABEL: test_mm_maskz_cvtne2ps2bf16_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtne2ps2bf16 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0x89,0x72,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm_maskz_cvtne2ps2bf16_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0x89,0x72,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #2
+ %1 = bitcast i8 %U to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define <2 x i64> @test_mm_mask_cvtne2ps2bf16_128(<2 x i64> %C, i8 zeroext %U, <4 x float> %A, <4 x float> %B) local_unnamed_addr #0 {
+; X86-LABEL: test_mm_mask_cvtne2ps2bf16_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtne2ps2bf16 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x09,0x72,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm_mask_cvtne2ps2bf16_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x09,0x72,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float> %A, <4 x float> %B) #2
+ %1 = bitcast <2 x i64> %C to <8 x i16>
+ %2 = bitcast i8 %U to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %0, <8 x i16> %1
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <16 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float>, <8 x float>) #3
+
+define <4 x i64> @test_mm256_cvtne2ps2bf16_256(<8 x float> %A, <8 x float> %B) local_unnamed_addr #1 {
+; CHECK-LABEL: test_mm256_cvtne2ps2bf16_256:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtne2ps2bf16 %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7f,0x28,0x72,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4
+ %1 = bitcast <16 x i16> %0 to <4 x i64>
+ ret <4 x i64> %1
+}
+
+define <4 x i64> @test_mm256_maskz_cvtne2ps2bf16_256(<8 x float> %A, <8 x float> %B, i16 zeroext %U) local_unnamed_addr #1 {
+; X86-LABEL: test_mm256_maskz_cvtne2ps2bf16_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ps2bf16 %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xa9,0x72,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_maskz_cvtne2ps2bf16_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xa9,0x72,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4
+ %1 = bitcast i16 %U to <16 x i1>
+ %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
+ %3 = bitcast <16 x i16> %2 to <4 x i64>
+ ret <4 x i64> %3
+}
+
+define <4 x i64> @test_mm256_mask_cvtne2ps2bf16_256(<4 x i64> %C, i16 zeroext %U, <8 x float> %A, <8 x float> %B) local_unnamed_addr #1 {
+; X86-LABEL: test_mm256_mask_cvtne2ps2bf16_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ps2bf16 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x77,0x29,0x72,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_mask_cvtne2ps2bf16_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ps2bf16 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x77,0x29,0x72,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.256(<8 x float> %A, <8 x float> %B) #4
+ %1 = bitcast <4 x i64> %C to <16 x i16>
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i16> %0, <16 x i16> %1
+ %4 = bitcast <16 x i16> %3 to <4 x i64>
+ ret <4 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float>) #3
+
+define <2 x i64> @test_mm256_cvtneps2bf16_256(<8 x float> %A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_cvtneps2bf16_256:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtneps2bf16 %ymm0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x28,0x72,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define <2 x i64> @test_mm256_maskz_cvtneps2bf16_256(<8 x float> %A, i8 zeroext %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm256_maskz_cvtneps2bf16_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtneps2bf16 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xa9,0x72,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_maskz_cvtneps2bf16_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xa9,0x72,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4
+ %1 = bitcast i8 %U to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define <2 x i64> @test_mm256_mask_cvtneps2bf16_256(<2 x i64> %C, i8 zeroext %U, <8 x float> %A) local_unnamed_addr #2 {
+; X86-LABEL: test_mm256_mask_cvtneps2bf16_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtneps2bf16 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x29,0x72,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_mask_cvtneps2bf16_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x29,0x72,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float> %A) #4
+ %1 = bitcast <2 x i64> %C to <8 x i16>
+ %2 = bitcast i8 %U to <8 x i1>
+ %3 = select <8 x i1> %2, <8 x i16> %0, <8 x i16> %1
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x i16> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float>, <8 x i16>, <4 x i1>) #3
+
+define <2 x i64> @test_mm128_cvtneps2bf16_128(<4 x float> %A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm128_cvtneps2bf16_128:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vcvtneps2bf16 %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x08,0x72,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x i16> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x i16> undef, <4 x i1> <i1 true, i1 true, i1 true, i1 true>) #4
+ %1 = bitcast <8 x i16> %0 to <2 x i64>
+ ret <2 x i64> %1
+}
+
+define <2 x i64> @test_mm128_maskz_cvtneps2bf16_128(<4 x float> %A, i8 zeroext %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm128_maskz_cvtneps2bf16_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtneps2bf16 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0x89,0x72,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm128_maskz_cvtneps2bf16_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0x89,0x72,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = bitcast i8 %U to <8 x i1>
+ %1 = shufflevector <8 x i1> %0, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ %2 = tail call <8 x i16> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x i16> zeroinitializer, <4 x i1> %1) #4
+ %3 = bitcast <8 x i16> %2 to <2 x i64>
+ ret <2 x i64> %3
+}
+
+define <2 x i64> @test_mm128_mask_cvtneps2bf16_128(<2 x i64> %C, i8 zeroext %U, <4 x float> %A) local_unnamed_addr #2 {
+; X86-LABEL: test_mm128_mask_cvtneps2bf16_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtneps2bf16 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x09,0x72,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm128_mask_cvtneps2bf16_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x09,0x72,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = bitcast i8 %U to <8 x i1>
+ %1 = shufflevector <8 x i1> %0, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ %2 = bitcast <2 x i64> %C to <8 x i16>
+ %3 = tail call <8 x i16> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x i16> %2, <4 x i1> %1) #4
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+; Make sure we don't fold a select into the 128 bit form of cvtneps2bf16. It
+; always writes zeros to bits 127:64 regardless of mask.
+define <2 x i64> @test_mm128_cvtneps2bf16_128_select(<2 x i64> %C, i8 zeroext %U, <4 x float> %A) local_unnamed_addr #2 {
+; X86-LABEL: test_mm128_cvtneps2bf16_128_select:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vcvtneps2bf16 %xmm1, %xmm1 # encoding: [0x62,0xf2,0x7e,0x08,0x72,0xc9]
+; X86-NEXT: vmovdqu16 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf1,0xff,0x09,0x6f,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm128_cvtneps2bf16_128_select:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneps2bf16 %xmm1, %xmm1 # encoding: [0x62,0xf2,0x7e,0x08,0x72,0xc9]
+; X64-NEXT: vmovdqu16 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf1,0xff,0x09,0x6f,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = bitcast i8 %U to <8 x i1>
+ %1 = bitcast <2 x i64> %C to <8 x i16>
+ %2 = tail call <8 x i16> @llvm.x86.avx512bf16.mask.cvtneps2bf16.128(<4 x float> %A, <8 x i16> undef, <4 x i1> <i1 true, i1 true, i1 true, i1 true>) #4
+ %3 = select <8 x i1> %0, <8 x i16> %2, <8 x i16> %1
+ %4 = bitcast <8 x i16> %3 to <2 x i64>
+ ret <2 x i64> %4
+}
+
+declare <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float>, <8 x i32>, <8 x i32>) #3
+
+define <8 x float> @test_mm256_dpbf16ps_256(<8 x float> %E, <8 x i32> %A, <8 x i32> %B) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_dpbf16ps_256:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vdpbf16ps %ymm2, %ymm1, %ymm0 # encoding: [0x62,0xf2,0x76,0x28,0x52,0xc2]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <8 x i32> %A, <8 x i32> %B) #4
+ ret <8 x float> %0
+}
+
+define <8 x float> @test_mm256_maskz_dpbf16ps_256(<8 x float> %E, <8 x i32> %A, <8 x i32> %B, i8 zeroext %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm256_maskz_dpbf16ps_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vdpbf16ps %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xa9,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_maskz_dpbf16ps_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xa9,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <8 x i32> %A, <8 x i32> %B) #4
+ %1 = bitcast i8 %U to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x float> %0, <8 x float> zeroinitializer
+ ret <8 x float> %2
+}
+define <8 x float> @test_mm256_mask_dpbf16ps_256(i8 zeroext %U, <8 x float> %E, <8 x i32> %A, <8 x i32> %B) local_unnamed_addr #2 {
+; X86-LABEL: test_mm256_mask_dpbf16ps_256:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vdpbf16ps %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x76,0x29,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm256_mask_dpbf16ps_256:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x76,0x29,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256(<8 x float> %E, <8 x i32> %A, <8 x i32> %B) #4
+ %1 = bitcast i8 %U to <8 x i1>
+ %2 = select <8 x i1> %1, <8 x float> %0, <8 x float> %E
+ ret <8 x float> %2
+}
+
+declare <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float>, <4 x i32>, <4 x i32>) #3
+
+define <4 x float> @test_mm128_dpbf16ps_128(<4 x float> %E, <4 x i32> %A, <4 x i32> %B) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm128_dpbf16ps_128:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 # encoding: [0x62,0xf2,0x76,0x08,0x52,0xc2]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <4 x i32> %A, <4x i32> %B) #4
+ ret <4 x float> %0
+}
+
+define <4 x float> @test_mm128_maskz_dpbf16ps_128(<4 x float> %E, <4 x i32> %A, <4 x i32> %B, i4 zeroext %U) local_unnamed_addr #2 {
+; X86-LABEL: test_mm128_maskz_dpbf16ps_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0x89,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm128_maskz_dpbf16ps_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0x89,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <4 x i32> %A, <4 x i32> %B) #4
+ %1 = bitcast i4 %U to <4 x i1>
+ %2 = select <4 x i1> %1, <4 x float> %0, <4 x float> zeroinitializer
+ ret <4 x float> %2
+}
+define <4 x float> @test_mm128_mask_dpbf16ps_128(i4 zeroext %U, <4 x float> %E, <4 x i32> %A, <4 x i32> %B) local_unnamed_addr #2 {
+; X86-LABEL: test_mm128_mask_dpbf16ps_128:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movb {{[0-9]+}}(%esp), %al # encoding: [0x8a,0x44,0x24,0x04]
+; X86-NEXT: kmovd %eax, %k1 # encoding: [0xc5,0xfb,0x92,0xc8]
+; X86-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x09,0x52,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+;
+; X64-LABEL: test_mm128_mask_dpbf16ps_128:
+; X64: # %bb.0: # %entry
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vdpbf16ps %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x09,0x52,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+entry:
+ %0 = tail call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128(<4 x float> %E, <4 x i32> %A, <4 x i32> %B) #4
+ %1 = bitcast i4 %U to <4 x i1>
+ %2 = select <4 x i1> %1, <4 x float> %0, <4 x float> %E
+ ret <4 x float> %2
+}
Added: llvm/trunk/test/MC/Disassembler/X86/avx512bf16-att.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx512bf16-att.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx512bf16-att.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/avx512bf16-att.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,82 @@
+# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 %zmm4, %zmm3, %zmm2
+0x62,0xf2,0x67,0x48,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %zmm4, %zmm3, %zmm2 {%k7}
+0x62,0xf2,0x67,0x4f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %zmm4, %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x67,0xcf,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %zmm3, %zmm2
+0x62,0xf2,0x67,0x48,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+0x62,0xf2,0x67,0x4f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%eax){1to16}, %zmm3, %zmm2
+0x62,0xf2,0x67,0x58,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 -2048(,%ebp,2), %zmm3, %zmm2
+0x62,0xf2,0x67,0x48,0x72,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x67,0xcf,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%edx){1to16}, %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x67,0xdf,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 %zmm3, %ymm2
+0x62,0xf2,0x7e,0x48,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %zmm3, %ymm2 {%k7}
+0x62,0xf2,0x7e,0x4f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %zmm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x7e,0xcf,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 268435456(%esp,%esi,8), %ymm2
+0x62,0xf2,0x7e,0x48,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 291(%edi,%eax,4), %ymm2 {%k7}
+0x62,0xf2,0x7e,0x4f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 (%eax){1to16}, %ymm2
+0x62,0xf2,0x7e,0x58,0x72,0x10
+
+# CHECK: vcvtneps2bf16 -2048(,%ebp,2), %ymm2
+0x62,0xf2,0x7e,0x48,0x72,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtneps2bf16 8128(%ecx), %ymm2 {%k7} {z}
+0x62,0xf2,0x7e,0xcf,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%edx){1to16}, %ymm2 {%k7} {z}
+0x62,0xf2,0x7e,0xdf,0x72,0x52,0x80
+
+# CHECK: vdpbf16ps %zmm4, %zmm3, %zmm2
+0x62,0xf2,0x66,0x48,0x52,0xd4
+
+# CHECK: vdpbf16ps %zmm4, %zmm3, %zmm2 {%k7}
+0x62,0xf2,0x66,0x4f,0x52,0xd4
+
+# CHECK: vdpbf16ps %zmm4, %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x66,0xcf,0x52,0xd4
+
+# CHECK: vdpbf16ps 268435456(%esp,%esi,8), %zmm3, %zmm2
+0x62,0xf2,0x66,0x48,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+0x62,0xf2,0x66,0x4f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%eax){1to16}, %zmm3, %zmm2
+0x62,0xf2,0x66,0x58,0x52,0x10
+
+# CHECK: vdpbf16ps -2048(,%ebp,2), %zmm3, %zmm2
+0x62,0xf2,0x66,0x48,0x52,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vdpbf16ps 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x66,0xcf,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps -512(%edx){1to16}, %zmm3, %zmm2 {%k7} {z}
+0x62,0xf2,0x66,0xdf,0x52,0x52,0x80
Added: llvm/trunk/test/MC/Disassembler/X86/avx512bf16-intel.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx512bf16-intel.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx512bf16-intel.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/avx512bf16-intel.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,82 @@
+# RUN: llvm-mc --disassemble %s -triple=i686 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 zmm2, zmm3, zmm4
+0x62,0xf2,0x67,0x48,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 zmm2 {k7}, zmm3, zmm4
+0x62,0xf2,0x67,0x4f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf2,0x67,0xcf,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x48,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x4f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 zmm2, zmm3, dword ptr [eax]{1to16}
+0x62,0xf2,0x67,0x58,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x67,0x48,0x72,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x67,0xcf,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 zmm2 {k7} {z}, zmm3, dword ptr [edx - 512]{1to16}
+0x62,0xf2,0x67,0xdf,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 ymm2, zmm3
+0x62,0xf2,0x7e,0x48,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 ymm2 {k7}, zmm3
+0x62,0xf2,0x7e,0x4f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 ymm2 {k7} {z}, zmm3
+0x62,0xf2,0x7e,0xcf,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x48,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x7e,0x4f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 ymm2, dword ptr [eax]{1to16}
+0x62,0xf2,0x7e,0x58,0x72,0x10
+
+# CHECK: vcvtneps2bf16 ymm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x7e,0x48,0x72,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtneps2bf16 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x7e,0xcf,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 ymm2 {k7} {z}, dword ptr [edx - 512]{1to16}
+0x62,0xf2,0x7e,0xdf,0x72,0x52,0x80
+
+# CHECK: vdpbf16ps zmm2, zmm3, zmm4
+0x62,0xf2,0x66,0x48,0x52,0xd4
+
+# CHECK: vdpbf16ps zmm2 {k7}, zmm3, zmm4
+0x62,0xf2,0x66,0x4f,0x52,0xd4
+
+# CHECK: vdpbf16ps zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf2,0x66,0xcf,0x52,0xd4
+
+# CHECK: vdpbf16ps zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x66,0x48,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x66,0x4f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps zmm2, zmm3, dword ptr [eax]{1to16}
+0x62,0xf2,0x66,0x58,0x52,0x10
+
+# CHECK: vdpbf16ps zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x66,0x48,0x52,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vdpbf16ps zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x66,0xcf,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps zmm2 {k7} {z}, zmm3, dword ptr [edx - 512]{1to16}
+0x62,0xf2,0x66,0xdf,0x52,0x52,0x80
Added: llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-att.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-att.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-att.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-att.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,157 @@
+# RUN: llvm-mc --disassemble %s -triple=i686-apple-darwin9 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2
+0x62,0xf2,0x67,0x28,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2 {%k7}
+0x62,0xf2,0x67,0x2f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %ymm4, %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x67,0xaf,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2
+0x62,0xf2,0x67,0x08,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2 {%k7}
+0x62,0xf2,0x67,0x0f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 %xmm4, %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x67,0x8f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %ymm3, %ymm2
+0x62,0xf2,0x67,0x28,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+0x62,0xf2,0x67,0x2f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%eax){1to8}, %ymm3, %ymm2
+0x62,0xf2,0x67,0x38,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 -1024(,%ebp,2), %ymm3, %ymm2
+0x62,0xf2,0x67,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x67,0xaf,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x67,0xbf,0x72,0x52,0x80
+
+# CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %xmm3, %xmm2
+0x62,0xf2,0x67,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+0x62,0xf2,0x67,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%eax){1to4}, %xmm3, %xmm2
+0x62,0xf2,0x67,0x18,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 -512(,%ebp,2), %xmm3, %xmm2
+0x62,0xf2,0x67,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x67,0x8f,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x67,0x9f,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 %xmm3, %xmm2
+0x62,0xf2,0x7e,0x08,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %xmm3, %xmm2 {%k7}
+0x62,0xf2,0x7e,0x0f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0x8f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %ymm3, %xmm2
+0x62,0xf2,0x7e,0x28,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %ymm3, %xmm2 {%k7}
+0x62,0xf2,0x7e,0x2f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 %ymm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0xaf,0x72,0xd3
+
+# CHECK: vcvtneps2bf16x 268435456(%esp,%esi,8), %xmm2
+0x62,0xf2,0x7e,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16x 291(%edi,%eax,4), %xmm2 {%k7}
+0x62,0xf2,0x7e,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 (%eax){1to4}, %xmm2
+0x62,0xf2,0x7e,0x18,0x72,0x10
+
+# CHECK: vcvtneps2bf16x -512(,%ebp,2), %xmm2
+0x62,0xf2,0x7e,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtneps2bf16x 2032(%ecx), %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0x8f,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%edx){1to4}, %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0x9f,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 (%eax){1to8}, %xmm2
+0x62,0xf2,0x7e,0x38,0x72,0x10
+
+# CHECK: vcvtneps2bf16y -1024(,%ebp,2), %xmm2
+0x62,0xf2,0x7e,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtneps2bf16y 4064(%ecx), %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0xaf,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%edx){1to8}, %xmm2 {%k7} {z}
+0x62,0xf2,0x7e,0xbf,0x72,0x52,0x80
+
+# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2
+0x62,0xf2,0x66,0x28,0x52,0xd4
+
+# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2 {%k7}
+0x62,0xf2,0x66,0x2f,0x52,0xd4
+
+# CHECK: vdpbf16ps %ymm4, %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x66,0xaf,0x52,0xd4
+
+# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2
+0x62,0xf2,0x66,0x08,0x52,0xd4
+
+# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2 {%k7}
+0x62,0xf2,0x66,0x0f,0x52,0xd4
+
+# CHECK: vdpbf16ps %xmm4, %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x66,0x8f,0x52,0xd4
+
+# CHECK: vdpbf16ps 268435456(%esp,%esi,8), %ymm3, %ymm2
+0x62,0xf2,0x66,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+0x62,0xf2,0x66,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%eax){1to8}, %ymm3, %ymm2
+0x62,0xf2,0x66,0x38,0x52,0x10
+
+# CHECK: vdpbf16ps -1024(,%ebp,2), %ymm3, %ymm2
+0x62,0xf2,0x66,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vdpbf16ps 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x66,0xaf,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
+0x62,0xf2,0x66,0xbf,0x52,0x52,0x80
+
+# CHECK: vdpbf16ps 268435456(%esp,%esi,8), %xmm3, %xmm2
+0x62,0xf2,0x66,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+0x62,0xf2,0x66,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%eax){1to4}, %xmm3, %xmm2
+0x62,0xf2,0x66,0x18,0x52,0x10
+
+# CHECK: vdpbf16ps -512(,%ebp,2), %xmm3, %xmm2
+0x62,0xf2,0x66,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vdpbf16ps 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x66,0x8f,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
+0x62,0xf2,0x66,0x9f,0x52,0x52,0x80
Added: llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-intel.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-intel.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-intel.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/avx512bf16vl-intel.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,157 @@
+# RUN: llvm-mc --disassemble %s -triple=i686 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymm4
+0x62,0xf2,0x67,0x28,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 ymm2 {k7}, ymm3, ymm4
+0x62,0xf2,0x67,0x2f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf2,0x67,0xaf,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmm4
+0x62,0xf2,0x67,0x08,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 xmm2 {k7}, xmm3, xmm4
+0x62,0xf2,0x67,0x0f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf2,0x67,0x8f,0x72,0xd4
+
+# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x28,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x2f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 ymm2, ymm3, dword ptr [eax]{1to8}
+0x62,0xf2,0x67,0x38,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x67,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x67,0xaf,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x67,0xbf,0x72,0x52,0x80
+
+# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 xmm2, xmm3, dword ptr [eax]{1to4}
+0x62,0xf2,0x67,0x18,0x72,0x10
+
+# CHECK: vcvtne2ps2bf16 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x67,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x67,0x8f,0x72,0x51,0x7f
+
+# CHECK: vcvtne2ps2bf16 xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x67,0x9f,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 xmm2, xmm3
+0x62,0xf2,0x7e,0x08,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2 {k7}, xmm3
+0x62,0xf2,0x7e,0x0f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, xmm3
+0x62,0xf2,0x7e,0x8f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2, ymm3
+0x62,0xf2,0x7e,0x28,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2 {k7}, ymm3
+0x62,0xf2,0x7e,0x2f,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, ymm3
+0x62,0xf2,0x7e,0xaf,0x72,0xd3
+
+# CHECK: vcvtneps2bf16 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x08,0x72,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x7e,0x0f,0x72,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 xmm2, dword ptr [eax]{1to4}
+0x62,0xf2,0x7e,0x18,0x72,0x10
+
+# CHECK: vcvtneps2bf16 xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x7e,0x08,0x72,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x7e,0x8f,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x7e,0x9f,0x72,0x52,0x80
+
+# CHECK: vcvtneps2bf16 xmm2, dword ptr [eax]{1to8}
+0x62,0xf2,0x7e,0x38,0x72,0x10
+
+# CHECK: vcvtneps2bf16 xmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x7e,0x28,0x72,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x7e,0xaf,0x72,0x51,0x7f
+
+# CHECK: vcvtneps2bf16 xmm2 {k7} {z}, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x7e,0xbf,0x72,0x52,0x80
+
+# CHECK: vdpbf16ps ymm2, ymm3, ymm4
+0x62,0xf2,0x66,0x28,0x52,0xd4
+
+# CHECK: vdpbf16ps ymm2 {k7}, ymm3, ymm4
+0x62,0xf2,0x66,0x2f,0x52,0xd4
+
+# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf2,0x66,0xaf,0x52,0xd4
+
+# CHECK: vdpbf16ps xmm2, xmm3, xmm4
+0x62,0xf2,0x66,0x08,0x52,0xd4
+
+# CHECK: vdpbf16ps xmm2 {k7}, xmm3, xmm4
+0x62,0xf2,0x66,0x0f,0x52,0xd4
+
+# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf2,0x66,0x8f,0x52,0xd4
+
+# CHECK: vdpbf16ps ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x66,0x28,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x66,0x2f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps ymm2, ymm3, dword ptr [eax]{1to8}
+0x62,0xf2,0x66,0x38,0x52,0x10
+
+# CHECK: vdpbf16ps ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x66,0x28,0x52,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x66,0xaf,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x66,0xbf,0x52,0x52,0x80
+
+# CHECK: vdpbf16ps xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x66,0x08,0x52,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x66,0x0f,0x52,0x94,0x87,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps xmm2, xmm3, dword ptr [eax]{1to4}
+0x62,0xf2,0x66,0x18,0x52,0x10
+
+# CHECK: vdpbf16ps xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x66,0x08,0x52,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x66,0x8f,0x52,0x51,0x7f
+
+# CHECK: vdpbf16ps xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x66,0x9f,0x52,0x52,0x80
Added: llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,82 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22
+0x62,0x82,0x47,0x40,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22 {%k7}
+0x62,0x82,0x47,0x47,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %zmm24, %zmm23, %zmm22 {%k7} {z}
+0x62,0x82,0x47,0xc7,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 268435456(%rbp,%r14,8), %zmm23, %zmm22
+0x62,0xa2,0x47,0x40,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+0x62,0xc2,0x47,0x47,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%rip){1to16}, %zmm23, %zmm22
+0x62,0xe2,0x47,0x50,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 -2048(,%rbp,2), %zmm23, %zmm22
+0x62,0xe2,0x47,0x40,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+0x62,0xe2,0x47,0xc7,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
+0x62,0xe2,0x47,0xd7,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 %zmm23, %ymm22
+0x62,0xa2,0x7e,0x48,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %zmm23, %ymm22 {%k7}
+0x62,0xa2,0x7e,0x4f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %zmm23, %ymm22 {%k7} {z}
+0x62,0xa2,0x7e,0xcf,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 268435456(%rbp,%r14,8), %ymm22
+0x62,0xa2,0x7e,0x48,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 291(%r8,%rax,4), %ymm22 {%k7}
+0x62,0xc2,0x7e,0x4f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 (%rip){1to16}, %ymm22
+0x62,0xe2,0x7e,0x58,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16 -2048(,%rbp,2), %ymm22
+0x62,0xe2,0x7e,0x48,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtneps2bf16 8128(%rcx), %ymm22 {%k7} {z}
+0x62,0xe2,0x7e,0xcf,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%rdx){1to16}, %ymm22 {%k7} {z}
+0x62,0xe2,0x7e,0xdf,0x72,0x72,0x80
+
+# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22
+0x62,0x82,0x46,0x40,0x52,0xf0
+
+# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22 {%k7}
+0x62,0x82,0x46,0x47,0x52,0xf0
+
+# CHECK: vdpbf16ps %zmm24, %zmm23, %zmm22 {%k7} {z}
+0x62,0x82,0x46,0xc7,0x52,0xf0
+
+# CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %zmm23, %zmm22
+0x62,0xa2,0x46,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+0x62,0xc2,0x46,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%rip){1to16}, %zmm23, %zmm22
+0x62,0xe2,0x46,0x50,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps -2048(,%rbp,2), %zmm23, %zmm22
+0x62,0xe2,0x46,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vdpbf16ps 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+0x62,0xe2,0x46,0xc7,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
+0x62,0xe2,0x46,0xd7,0x52,0x72,0x80
Added: llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,83 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmm24
+0x62,0x82,0x47,0x40,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 zmm22 {k7}, zmm23, zmm24
+0x62,0x82,0x47,0x47,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x82,0x47,0xc7,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x40,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x47,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 zmm22, zmm23, dword ptr [rip]{1to16}
+0x62,0xe2,0x47,0x50,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x47,0x40,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x47,0xc7,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
+0x62,0xe2,0x47,0xd7,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 ymm22, zmm23
+0x62,0xa2,0x7e,0x48,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 ymm22 {k7}, zmm23
+0x62,0xa2,0x7e,0x4f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, zmm23
+0x62,0xa2,0x7e,0xcf,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x7e,0x48,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x7e,0x4f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 ymm22, dword ptr [rip]{1to16}
+0x62,0xe2,0x7e,0x58,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16 ymm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x7e,0x48,0x72,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x7e,0xcf,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 ymm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
+0x62,0xe2,0x7e,0xdf,0x72,0x72,0x80
+
+# CHECK: vdpbf16ps zmm22, zmm23, zmm24
+0x62,0x82,0x46,0x40,0x52,0xf0
+
+# CHECK: vdpbf16ps zmm22 {k7}, zmm23, zmm24
+0x62,0x82,0x46,0x47,0x52,0xf0
+
+# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x82,0x46,0xc7,0x52,0xf0
+
+# CHECK: vdpbf16ps zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x46,0x40,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x46,0x47,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps zmm22, zmm23, dword ptr [rip]{1to16}
+0x62,0xe2,0x46,0x50,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x46,0x40,0x52,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x46,0xc7,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
+0x62,0xe2,0x46,0xd7,0x52,0x72,0x80
+
Added: llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,158 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22
+0x62,0x82,0x47,0x20,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22 {%k7}
+0x62,0x82,0x47,0x27,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %ymm24, %ymm23, %ymm22 {%k7} {z}
+0x62,0x82,0x47,0xa7,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22
+0x62,0x82,0x47,0x00,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22 {%k7}
+0x62,0x82,0x47,0x07,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 %xmm24, %xmm23, %xmm22 {%k7} {z}
+0x62,0x82,0x47,0x87,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 268435456(%rbp,%r14,8), %ymm23, %ymm22
+0x62,0xa2,0x47,0x20,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+0x62,0xc2,0x47,0x27,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%rip){1to8}, %ymm23, %ymm22
+0x62,0xe2,0x47,0x30,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 -1024(,%rbp,2), %ymm23, %ymm22
+0x62,0xe2,0x47,0x20,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+0x62,0xe2,0x47,0xa7,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
+0x62,0xe2,0x47,0xb7,0x72,0x72,0x80
+
+# CHECK: vcvtne2ps2bf16 268435456(%rbp,%r14,8), %xmm23, %xmm22
+0x62,0xa2,0x47,0x00,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+0x62,0xc2,0x47,0x07,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 (%rip){1to4}, %xmm23, %xmm22
+0x62,0xe2,0x47,0x10,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 -512(,%rbp,2), %xmm23, %xmm22
+0x62,0xe2,0x47,0x00,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+0x62,0xe2,0x47,0x87,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
+0x62,0xe2,0x47,0x97,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 %xmm23, %xmm22
+0x62,0xa2,0x7e,0x08,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %xmm23, %xmm22 {%k7}
+0x62,0xa2,0x7e,0x0f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %xmm23, %xmm22 {%k7} {z}
+0x62,0xa2,0x7e,0x8f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %ymm23, %xmm22
+0x62,0xa2,0x7e,0x28,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %ymm23, %xmm22 {%k7}
+0x62,0xa2,0x7e,0x2f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 %ymm23, %xmm22 {%k7} {z}
+0x62,0xa2,0x7e,0xaf,0x72,0xf7
+
+# CHECK: vcvtneps2bf16x 268435456(%rbp,%r14,8), %xmm22
+0x62,0xa2,0x7e,0x08,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16x 291(%r8,%rax,4), %xmm22 {%k7}
+0x62,0xc2,0x7e,0x0f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 (%rip){1to4}, %xmm22
+0x62,0xe2,0x7e,0x18,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16x -512(,%rbp,2), %xmm22
+0x62,0xe2,0x7e,0x08,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtneps2bf16x 2032(%rcx), %xmm22 {%k7} {z}
+0x62,0xe2,0x7e,0x8f,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%rdx){1to4}, %xmm22 {%k7} {z}
+0x62,0xe2,0x7e,0x9f,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 (%rip){1to8}, %xmm22
+0x62,0xe2,0x7e,0x38,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16y -1024(,%rbp,2), %xmm22
+0x62,0xe2,0x7e,0x28,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtneps2bf16y 4064(%rcx), %xmm22 {%k7} {z}
+0x62,0xe2,0x7e,0xaf,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 -512(%rdx){1to8}, %xmm22 {%k7} {z}
+0x62,0xe2,0x7e,0xbf,0x72,0x72,0x80
+
+# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22
+0x62,0x82,0x46,0x20,0x52,0xf0
+
+# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22 {%k7}
+0x62,0x82,0x46,0x27,0x52,0xf0
+
+# CHECK: vdpbf16ps %ymm24, %ymm23, %ymm22 {%k7} {z}
+0x62,0x82,0x46,0xa7,0x52,0xf0
+
+# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22
+0x62,0x82,0x46,0x00,0x52,0xf0
+
+# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22 {%k7}
+0x62,0x82,0x46,0x07,0x52,0xf0
+
+# CHECK: vdpbf16ps %xmm24, %xmm23, %xmm22 {%k7} {z}
+0x62,0x82,0x46,0x87,0x52,0xf0
+
+# CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %ymm23, %ymm22
+0x62,0xa2,0x46,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+0x62,0xc2,0x46,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%rip){1to8}, %ymm23, %ymm22
+0x62,0xe2,0x46,0x30,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps -1024(,%rbp,2), %ymm23, %ymm22
+0x62,0xe2,0x46,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vdpbf16ps 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+0x62,0xe2,0x46,0xa7,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
+0x62,0xe2,0x46,0xb7,0x52,0x72,0x80
+
+# CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %xmm23, %xmm22
+0x62,0xa2,0x46,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+0x62,0xc2,0x46,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps (%rip){1to4}, %xmm23, %xmm22
+0x62,0xe2,0x46,0x10,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps -512(,%rbp,2), %xmm23, %xmm22
+0x62,0xe2,0x46,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vdpbf16ps 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+0x62,0xe2,0x46,0x87,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
+0x62,0xe2,0x46,0x97,0x52,0x72,0x80
+
Added: llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt (added)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt Mon May 6 02:24:36 2019
@@ -0,0 +1,158 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s
+
+# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymm24
+0x62,0x82,0x47,0x20,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 ymm22 {k7}, ymm23, ymm24
+0x62,0x82,0x47,0x27,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x82,0x47,0xa7,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmm24
+0x62,0x82,0x47,0x00,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 xmm22 {k7}, xmm23, xmm24
+0x62,0x82,0x47,0x07,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x82,0x47,0x87,0x72,0xf0
+
+# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x20,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x27,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 ymm22, ymm23, dword ptr [rip]{1to8}
+0x62,0xe2,0x47,0x30,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x47,0x20,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x47,0xa7,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
+0x62,0xe2,0x47,0xb7,0x72,0x72,0x80
+
+# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x00,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtne2ps2bf16 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x07,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 xmm22, xmm23, dword ptr [rip]{1to4}
+0x62,0xe2,0x47,0x10,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtne2ps2bf16 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x47,0x00,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x47,0x87,0x72,0x71,0x7f
+
+# CHECK: vcvtne2ps2bf16 xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
+0x62,0xe2,0x47,0x97,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 xmm22, xmm23
+0x62,0xa2,0x7e,0x08,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22 {k7}, xmm23
+0x62,0xa2,0x7e,0x0f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, xmm23
+0x62,0xa2,0x7e,0x8f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22, ymm23
+0x62,0xa2,0x7e,0x28,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22 {k7}, ymm23
+0x62,0xa2,0x7e,0x2f,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, ymm23
+0x62,0xa2,0x7e,0xaf,0x72,0xf7
+
+# CHECK: vcvtneps2bf16 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x7e,0x08,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vcvtneps2bf16 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x7e,0x0f,0x72,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vcvtneps2bf16 xmm22, dword ptr [rip]{1to4}
+0x62,0xe2,0x7e,0x18,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16 xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x7e,0x08,0x72,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x7e,0x8f,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, dword ptr [rdx - 512]{1to4}
+0x62,0xe2,0x7e,0x9f,0x72,0x72,0x80
+
+# CHECK: vcvtneps2bf16 xmm22, dword ptr [rip]{1to8}
+0x62,0xe2,0x7e,0x38,0x72,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vcvtneps2bf16 xmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x7e,0x28,0x72,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x7e,0xaf,0x72,0x71,0x7f
+
+# CHECK: vcvtneps2bf16 xmm22 {k7} {z}, dword ptr [rdx - 512]{1to8}
+0x62,0xe2,0x7e,0xbf,0x72,0x72,0x80
+
+# CHECK: vdpbf16ps ymm22, ymm23, ymm24
+0x62,0x82,0x46,0x20,0x52,0xf0
+
+# CHECK: vdpbf16ps ymm22 {k7}, ymm23, ymm24
+0x62,0x82,0x46,0x27,0x52,0xf0
+
+# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x82,0x46,0xa7,0x52,0xf0
+
+# CHECK: vdpbf16ps xmm22, xmm23, xmm24
+0x62,0x82,0x46,0x00,0x52,0xf0
+
+# CHECK: vdpbf16ps xmm22 {k7}, xmm23, xmm24
+0x62,0x82,0x46,0x07,0x52,0xf0
+
+# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x82,0x46,0x87,0x52,0xf0
+
+# CHECK: vdpbf16ps ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x46,0x20,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x46,0x27,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps ymm22, ymm23, dword ptr [rip]{1to8}
+0x62,0xe2,0x46,0x30,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x46,0x20,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x46,0xa7,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
+0x62,0xe2,0x46,0xb7,0x52,0x72,0x80
+
+# CHECK: vdpbf16ps xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x46,0x00,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# CHECK: vdpbf16ps xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x46,0x07,0x52,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# CHECK: vdpbf16ps xmm22, xmm23, dword ptr [rip]{1to4}
+0x62,0xe2,0x46,0x10,0x52,0x35,0x00,0x00,0x00,0x00
+
+# CHECK: vdpbf16ps xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x46,0x00,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x46,0x87,0x52,0x71,0x7f
+
+# CHECK: vdpbf16ps xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
+0x62,0xe2,0x46,0x97,0x52,0x72,0x80
+
Added: llvm/trunk/test/MC/X86/avx512_bf16-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512_bf16-encoding.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/avx512_bf16-encoding.s (added)
+++ llvm/trunk/test/MC/X86/avx512_bf16-encoding.s Mon May 6 02:24:36 2019
@@ -0,0 +1,90 @@
+// RUN: llvm-mc -triple i686-unknown-unknown --show-encoding < %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x4f,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x57,0xcf,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%ecx), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x31]
+ vcvtne2ps2bf16 (%ecx), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 291(%esp,%esi,8), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%esp,%esi,8), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%esp,%esi,8), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 -64(%esp), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -64(%esp), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 (%eax){1to16}, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x30]
+ vcvtne2ps2bf16 (%eax){1to16}, %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 8128(%edx), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 8128(%edx), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 -8192(%edx), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -8192(%edx), %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 508(%edx){1to16}, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%edx){1to16}, %zmm5, %zmm6
+
+// CHECK: vcvtne2ps2bf16 -512(%edx){1to16}, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%edx){1to16}, %zmm5, %zmm6
+
+// CHECK: vcvtneps2bf16 %zmm5, %ymm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x72,0xf5]
+ vcvtneps2bf16 %zmm5, %ymm6
+
+// CHECK: vcvtneps2bf16 268435456(%esp,%esi,8), %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 268435456(%esp,%esi,8), %ymm6 {%k7}
+
+// CHECK: vcvtneps2bf16 (%ecx){1to16}, %ymm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x58,0x72,0x31]
+ vcvtneps2bf16 (%ecx){1to16}, %ymm6
+
+// CHECK: vcvtneps2bf16 8128(%ecx), %ymm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x72,0x71,0x7f]
+ vcvtneps2bf16 8128(%ecx), %ymm6
+
+// CHECK: vcvtneps2bf16 -512(%edx){1to16}, %ymm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xdf,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%edx){1to16}, %ymm6 {%k7} {z}
+
+// CHECK: vdpbf16ps %zmm4, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x48,0x52,0xf4]
+ vdpbf16ps %zmm4, %zmm5, %zmm6
+
+// CHECK: vdpbf16ps 268435456(%esp,%esi,8), %zmm5, %zmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x56,0x4f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%esp,%esi,8), %zmm5, %zmm6 {%k7}
+
+// CHECK: vdpbf16ps (%ecx){1to16}, %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x58,0x52,0x31]
+ vdpbf16ps (%ecx){1to16}, %zmm5, %zmm6
+
+// CHECK: vdpbf16ps 8128(%ecx), %zmm5, %zmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x48,0x52,0x71,0x7f]
+ vdpbf16ps 8128(%ecx), %zmm5, %zmm6
+
+// CHECK: vdpbf16ps -512(%edx){1to16}, %zmm5, %zmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x56,0xdf,0x52,0x72,0x80]
+ vdpbf16ps -512(%edx){1to16}, %zmm5, %zmm6 {%k7} {z}
+
Added: llvm/trunk/test/MC/X86/avx512_bf16_vl-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512_bf16_vl-encoding.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/avx512_bf16_vl-encoding.s (added)
+++ llvm/trunk/test/MC/X86/avx512_bf16_vl-encoding.s Mon May 6 02:24:36 2019
@@ -0,0 +1,170 @@
+// RUN: llvm-mc -triple i686-unknown-unknown --show-encoding < %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xf4]
+ vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x57,0x8f,0x72,0xf4]
+ vcvtne2ps2bf16 %xmm4, %xmm5, %xmm6 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%ecx), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x31]
+ vcvtne2ps2bf16 (%ecx), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 291(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -16(%esp), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -16(%esp), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 (%eax){1to4}, %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x30]
+ vcvtne2ps2bf16 (%eax){1to4}, %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 2032(%edx), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 2032(%edx), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -2048(%edx), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -2048(%edx), %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 508(%edx){1to4}, %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%edx){1to4}, %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -512(%edx){1to4}, %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%edx){1to4}, %xmm5, %xmm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xf4]
+ vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x57,0xaf,0x72,0xf4]
+ vcvtne2ps2bf16 %ymm4, %ymm5, %ymm6 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%ecx), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x31]
+ vcvtne2ps2bf16 (%ecx), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 291(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -32(%esp), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -32(%esp), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 (%eax){1to8}, %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x30]
+ vcvtne2ps2bf16 (%eax){1to8}, %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 4064(%edx), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 4064(%edx), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -4096(%edx), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -4096(%edx), %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 508(%edx){1to8}, %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%edx){1to8}, %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtne2ps2bf16 -512(%edx){1to8}, %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%edx){1to8}, %ymm5, %ymm6 {%k7}
+
+// CHECK: vcvtneps2bf16 %xmm5, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x72,0xf5]
+ vcvtneps2bf16 %xmm5, %xmm6
+
+// CHECK: vcvtneps2bf16x 268435456(%esp,%esi,8), %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16x 268435456(%esp,%esi,8), %xmm6 {%k7}
+
+// CHECK: vcvtneps2bf16 (%ecx){1to4}, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x18,0x72,0x31]
+ vcvtneps2bf16 (%ecx){1to4}, %xmm6
+
+// CHECK: vcvtneps2bf16x 2032(%ecx), %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x72,0x71,0x7f]
+ vcvtneps2bf16x 2032(%ecx), %xmm6
+
+// CHECK: vcvtneps2bf16 -512(%edx){1to4}, %xmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x9f,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%edx){1to4}, %xmm6 {%k7} {z}
+
+// CHECK: vcvtneps2bf16 %ymm5, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x72,0xf5]
+ vcvtneps2bf16 %ymm5, %xmm6
+
+// CHECK: vcvtneps2bf16y 268435456(%esp,%esi,8), %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16y 268435456(%esp,%esi,8), %xmm6 {%k7}
+
+// CHECK: vcvtneps2bf16 (%ecx){1to8}, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x38,0x72,0x31]
+ vcvtneps2bf16 (%ecx){1to8}, %xmm6
+
+// CHECK: vcvtneps2bf16y 4064(%ecx), %xmm6
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x72,0x71,0x7f]
+ vcvtneps2bf16y 4064(%ecx), %xmm6
+
+// CHECK: vcvtneps2bf16 -512(%edx){1to8}, %xmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xbf,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%edx){1to8}, %xmm6 {%k7} {z}
+
+// CHECK: vdpbf16ps %ymm4, %ymm5, %ymm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x28,0x52,0xf4]
+ vdpbf16ps %ymm4, %ymm5, %ymm6
+
+// CHECK: vdpbf16ps 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x56,0x2f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%esp,%esi,8), %ymm5, %ymm6 {%k7}
+
+// CHECK: vdpbf16ps (%ecx){1to8}, %ymm5, %ymm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x38,0x52,0x31]
+ vdpbf16ps (%ecx){1to8}, %ymm5, %ymm6
+
+// CHECK: vdpbf16ps 4064(%ecx), %ymm5, %ymm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x28,0x52,0x71,0x7f]
+ vdpbf16ps 4064(%ecx), %ymm5, %ymm6
+
+// CHECK: vdpbf16ps -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x56,0xbf,0x52,0x72,0x80]
+ vdpbf16ps -512(%edx){1to8}, %ymm5, %ymm6 {%k7} {z}
+
+// CHECK: vdpbf16ps %xmm4, %xmm5, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x08,0x52,0xf4]
+ vdpbf16ps %xmm4, %xmm5, %xmm6
+
+// CHECK: vdpbf16ps 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x56,0x0f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%esp,%esi,8), %xmm5, %xmm6 {%k7}
+
+// CHECK: vdpbf16ps (%ecx){1to4}, %xmm5, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x18,0x52,0x31]
+ vdpbf16ps (%ecx){1to4}, %xmm5, %xmm6
+
+// CHECK: vdpbf16ps 2032(%ecx), %xmm5, %xmm6
+// CHECK: encoding: [0x62,0xf2,0x56,0x08,0x52,0x71,0x7f]
+ vdpbf16ps 2032(%ecx), %xmm5, %xmm6
+
+// CHECK: vdpbf16ps -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x56,0x9f,0x52,0x72,0x80]
+ vdpbf16ps -512(%edx){1to4}, %xmm5, %xmm6 {%k7} {z}
+
Added: llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16.s (added)
+++ llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16.s Mon May 6 02:24:36 2019
@@ -0,0 +1,90 @@
+// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmm4
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xf4]
+ vcvtne2ps2bf16 zmm6, zmm5, zmm4
+
+// CHECK: vcvtne2ps2bf16 zmm6 {k7}, zmm5, zmm4
+// CHECK: encoding: [0x62,0xf2,0x57,0x4f,0x72,0xf4]
+ vcvtne2ps2bf16 zmm6 {k7}, zmm5, zmm4
+
+// CHECK: vcvtne2ps2bf16 zmm6 {k7} {z}, zmm5, zmm4
+// CHECK: encoding: [0x62,0xf2,0x57,0xcf,0x72,0xf4]
+ vcvtne2ps2bf16 zmm6 {k7} {z}, zmm5, zmm4
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [ecx]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x31]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [ecx]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp + 8*esi + 291]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp + 8*esi + 291]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp - 4]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [esp - 4]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x30]
+ vcvtne2ps2bf16 zmm6, zmm5, dword ptr [eax]{1to16}
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [edx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [edx + 8128]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [edx - 8192]
+// CHECK: encoding: [0x62,0xf2,0x57,0x48,0x72,0x72,0x80]
+ vcvtne2ps2bf16 zmm6, zmm5, zmmword ptr [edx - 8192]
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, dword ptr [edx + 508]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 zmm6, zmm5, dword ptr [edx + 508]{1to16}
+
+// CHECK: vcvtne2ps2bf16 zmm6, zmm5, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x57,0x58,0x72,0x72,0x80]
+ vcvtne2ps2bf16 zmm6, zmm5, dword ptr [edx - 512]{1to16}
+
+// CHECK: vcvtneps2bf16 ymm6, zmm5
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x72,0xf5]
+ vcvtneps2bf16 ymm6, zmm5
+
+// CHECK: vcvtneps2bf16 ymm6 {k7}, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 ymm6 {k7}, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneps2bf16 ymm6, dword ptr [ecx]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x58,0x72,0x31]
+ vcvtneps2bf16 ymm6, dword ptr [ecx]{1to16}
+
+// CHECK: vcvtneps2bf16 ymm6, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x72,0x71,0x7f]
+ vcvtneps2bf16 ymm6, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtneps2bf16 ymm6 {k7} {z}, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xdf,0x72,0x72,0x80]
+ vcvtneps2bf16 ymm6 {k7} {z}, dword ptr [edx - 512]{1to16}
+
+// CHECK: vdpbf16ps zmm6, zmm5, zmm4
+// CHECK: encoding: [0x62,0xf2,0x56,0x48,0x52,0xf4]
+ vdpbf16ps zmm6, zmm5, zmm4
+
+// CHECK: vdpbf16ps zmm6 {k7}, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x56,0x4f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps zmm6 {k7}, zmm5, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vdpbf16ps zmm6, zmm5, dword ptr [ecx]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x56,0x58,0x52,0x31]
+ vdpbf16ps zmm6, zmm5, dword ptr [ecx]{1to16}
+
+// CHECK: vdpbf16ps zmm6, zmm5, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x56,0x48,0x52,0x71,0x7f]
+ vdpbf16ps zmm6, zmm5, zmmword ptr [ecx + 8128]
+
+// CHECK: vdpbf16ps zmm6 {k7} {z}, zmm5, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x56,0xdf,0x52,0x72,0x80]
+ vdpbf16ps zmm6 {k7} {z}, zmm5, dword ptr [edx - 512]{1to16}
+
Added: llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16_vl.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16_vl.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16_vl.s (added)
+++ llvm/trunk/test/MC/X86/intel-syntax-avx512_bf16_vl.s Mon May 6 02:24:36 2019
@@ -0,0 +1,170 @@
+// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmm4
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xf4]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmm4
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7} {z}, xmm5, xmm4
+// CHECK: encoding: [0x62,0xf2,0x57,0x8f,0x72,0xf4]
+ vcvtne2ps2bf16 xmm6 {k7} {z}, xmm5, xmm4
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [ecx]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x31]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [ecx]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 291]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 291]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp - 4]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [esp - 4]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x30]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [eax]{1to4}
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx + 2032]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx - 2048]
+// CHECK: encoding: [0x62,0xf2,0x57,0x0f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, xmmword ptr [edx - 2048]
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx + 508]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx + 508]{1to4}
+
+// CHECK: vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x57,0x1f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 xmm6 {k7}, xmm5, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymm4
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xf4]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymm4
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7} {z}, ymm5, ymm4
+// CHECK: encoding: [0x62,0xf2,0x57,0xaf,0x72,0xf4]
+ vcvtne2ps2bf16 ymm6 {k7} {z}, ymm5, ymm4
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [ecx]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x31]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [ecx]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 291]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 291]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp - 4]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [esp - 4]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x30]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [eax]{1to8}
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx + 4064]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx - 4096]
+// CHECK: encoding: [0x62,0xf2,0x57,0x2f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, ymmword ptr [edx - 4096]
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx + 508]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx + 508]{1to8}
+
+// CHECK: vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x57,0x3f,0x72,0x72,0x80]
+ vcvtne2ps2bf16 ymm6 {k7}, ymm5, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvtneps2bf16 xmm6, xmm5
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x72,0xf5]
+ vcvtneps2bf16 xmm6, xmm5
+
+// CHECK: vcvtneps2bf16 xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 xmm6 {k7}, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneps2bf16 xmm6, dword ptr [ecx]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x18,0x72,0x31]
+ vcvtneps2bf16 xmm6, dword ptr [ecx]{1to4}
+
+// CHECK: vcvtneps2bf16 xmm6, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x72,0x71,0x7f]
+ vcvtneps2bf16 xmm6, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x9f,0x72,0x72,0x80]
+ vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvtneps2bf16 xmm6, ymm5
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x72,0xf5]
+ vcvtneps2bf16 xmm6, ymm5
+
+// CHECK: vcvtneps2bf16 xmm6 {k7}, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x2f,0x72,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 xmm6 {k7}, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneps2bf16 xmm6, dword ptr [ecx]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x38,0x72,0x31]
+ vcvtneps2bf16 xmm6, dword ptr [ecx]{1to8}
+
+// CHECK: vcvtneps2bf16 xmm6, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x72,0x71,0x7f]
+ vcvtneps2bf16 xmm6, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xbf,0x72,0x72,0x80]
+ vcvtneps2bf16 xmm6 {k7} {z}, dword ptr [edx - 512]{1to8}
+
+// CHECK: vdpbf16ps ymm6, ymm5, ymm4
+// CHECK: encoding: [0x62,0xf2,0x56,0x28,0x52,0xf4]
+ vdpbf16ps ymm6, ymm5, ymm4
+
+// CHECK: vdpbf16ps ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x56,0x2f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps ymm6 {k7}, ymm5, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vdpbf16ps ymm6, ymm5, dword ptr [ecx]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x56,0x38,0x52,0x31]
+ vdpbf16ps ymm6, ymm5, dword ptr [ecx]{1to8}
+
+// CHECK: vdpbf16ps ymm6, ymm5, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x56,0x28,0x52,0x71,0x7f]
+ vdpbf16ps ymm6, ymm5, ymmword ptr [ecx + 4064]
+
+// CHECK: vdpbf16ps ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x56,0xbf,0x52,0x72,0x80]
+ vdpbf16ps ymm6 {k7} {z}, ymm5, dword ptr [edx - 512]{1to8}
+
+// CHECK: vdpbf16ps xmm6, xmm5, xmm4
+// CHECK: encoding: [0x62,0xf2,0x56,0x08,0x52,0xf4]
+ vdpbf16ps xmm6, xmm5, xmm4
+
+// CHECK: vdpbf16ps xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x56,0x0f,0x52,0xb4,0xf4,0x00,0x00,0x00,0x10]
+ vdpbf16ps xmm6 {k7}, xmm5, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vdpbf16ps xmm6, xmm5, dword ptr [ecx]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x56,0x18,0x52,0x31]
+ vdpbf16ps xmm6, xmm5, dword ptr [ecx]{1to4}
+
+// CHECK: vdpbf16ps xmm6, xmm5, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x56,0x08,0x52,0x71,0x7f]
+ vdpbf16ps xmm6, xmm5, xmmword ptr [ecx + 2032]
+
+// CHECK: vdpbf16ps xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x56,0x9f,0x52,0x72,0x80]
+ vdpbf16ps xmm6 {k7} {z}, xmm5, dword ptr [edx - 512]{1to4}
+
Added: llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s (added)
+++ llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16.s Mon May 6 02:24:36 2019
@@ -0,0 +1,90 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmm28
+// CHECK: encoding: [0x62,0x02,0x17,0x40,0x72,0xf4]
+ vcvtne2ps2bf16 zmm30, zmm29, zmm28
+
+// CHECK: vcvtne2ps2bf16 zmm30 {k7}, zmm29, zmm28
+// CHECK: encoding: [0x62,0x02,0x17,0x47,0x72,0xf4]
+ vcvtne2ps2bf16 zmm30 {k7}, zmm29, zmm28
+
+// CHECK: vcvtne2ps2bf16 zmm30 {k7} {z}, zmm29, zmm28
+// CHECK: encoding: [0x62,0x02,0x17,0xc7,0x72,0xf4]
+ vcvtne2ps2bf16 zmm30 {k7} {z}, zmm29, zmm28
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rcx]
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x31]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rcx]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rax + 8*r14 + 291]
+// CHECK: encoding: [0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rax + 8*r14 + 291]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rax + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rax + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rsp - 4]
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rsp - 4]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rcx]{1to16}
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x31]
+ vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rcx]{1to16}
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rdx + 8128]
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rdx + 8128]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rdx - 8192]
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x72,0x80]
+ vcvtne2ps2bf16 zmm30, zmm29, zmmword ptr [rdx - 8192]
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rdx + 508]{1to16}
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rdx + 508]{1to16}
+
+// CHECK: vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x72,0x80]
+ vcvtne2ps2bf16 zmm30, zmm29, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vcvtneps2bf16 ymm30, zmm29
+// CHECK: encoding: [0x62,0x02,0x7e,0x48,0x72,0xf5]
+ vcvtneps2bf16 ymm30, zmm29
+
+// CHECK: vcvtneps2bf16 ymm30 {k7}, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x7e,0x4f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 ymm30 {k7}, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneps2bf16 ymm30, dword ptr [r9]{1to16}
+// CHECK: encoding: [0x62,0x42,0x7e,0x58,0x72,0x31]
+ vcvtneps2bf16 ymm30, dword ptr [r9]{1to16}
+
+// CHECK: vcvtneps2bf16 ymm30, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0x62,0x7e,0x48,0x72,0x71,0x7f]
+ vcvtneps2bf16 ymm30, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtneps2bf16 ymm30 {k7} {z}, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0x62,0x7e,0xdf,0x72,0x72,0x80]
+ vcvtneps2bf16 ymm30 {k7} {z}, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vdpbf16ps zmm30, zmm29, zmm28
+// CHECK: encoding: [0x62,0x02,0x16,0x40,0x52,0xf4]
+ vdpbf16ps zmm30, zmm29, zmm28
+
+// CHECK: vdpbf16ps zmm30 {k7}, zmm29, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x16,0x47,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps zmm30 {k7}, zmm29, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vdpbf16ps zmm30, zmm29, dword ptr [r9]{1to16}
+// CHECK: encoding: [0x62,0x42,0x16,0x50,0x52,0x31]
+ vdpbf16ps zmm30, zmm29, dword ptr [r9]{1to16}
+
+// CHECK: vdpbf16ps zmm30, zmm29, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0x62,0x16,0x40,0x52,0x71,0x7f]
+ vdpbf16ps zmm30, zmm29, zmmword ptr [rcx + 8128]
+
+// CHECK: vdpbf16ps zmm30 {k7} {z}, zmm29, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0x62,0x16,0xd7,0x52,0x72,0x80]
+ vdpbf16ps zmm30 {k7} {z}, zmm29, dword ptr [rdx - 512]{1to16}
+
Added: llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s (added)
+++ llvm/trunk/test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s Mon May 6 02:24:36 2019
@@ -0,0 +1,178 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmm28
+// CHECK: encoding: [0x62,0x02,0x17,0x00,0x72,0xf4]
+ vcvtne2ps2bf16 xmm30, xmm29, xmm28
+
+// CHECK: vcvtne2ps2bf16 xmm30 {k7}, xmm29, xmm28
+// CHECK: encoding: [0x62,0x02,0x17,0x07,0x72,0xf4]
+ vcvtne2ps2bf16 xmm30 {k7}, xmm29, xmm28
+
+// CHECK: vcvtne2ps2bf16 xmm30 {k7} {z}, xmm29, xmm28
+// CHECK: encoding: [0x62,0x02,0x17,0x87,0x72,0xf4]
+ vcvtne2ps2bf16 xmm30 {k7} {z}, xmm29, xmm28
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rcx]
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x31]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rcx]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 291]
+// CHECK: encoding: [0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 291]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rax + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rsp - 4]
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rsp - 4]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rcx]{1to4}
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x31]
+ vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rcx]{1to4}
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx + 2032]
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx + 2032]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx - 2048]
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x72,0x80]
+ vcvtne2ps2bf16 xmm30, xmm29, xmmword ptr [rdx - 2048]
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx + 508]{1to4}
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx + 508]{1to4}
+
+// CHECK: vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x72,0x80]
+ vcvtne2ps2bf16 xmm30, xmm29, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymm28
+// CHECK: encoding: [0x62,0x02,0x17,0x20,0x72,0xf4]
+ vcvtne2ps2bf16 ymm30, ymm29, ymm28
+
+// CHECK: vcvtne2ps2bf16 ymm30 {k7}, ymm29, ymm28
+// CHECK: encoding: [0x62,0x02,0x17,0x27,0x72,0xf4]
+ vcvtne2ps2bf16 ymm30 {k7}, ymm29, ymm28
+
+// CHECK: vcvtne2ps2bf16 ymm30 {k7} {z}, ymm29, ymm28
+// CHECK: encoding: [0x62,0x02,0x17,0xa7,0x72,0xf4]
+ vcvtne2ps2bf16 ymm30 {k7} {z}, ymm29, ymm28
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rcx]
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x31]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rcx]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 291]
+// CHECK: encoding: [0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 291]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rax + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rsp - 4]
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0xb4,0x24,0xfc,0xff,0xff,0xff]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rsp - 4]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rcx]{1to8}
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x31]
+ vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rcx]{1to8}
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx + 4064]
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx + 4064]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx - 4096]
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x72,0x80]
+ vcvtne2ps2bf16 ymm30, ymm29, ymmword ptr [rdx - 4096]
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx + 508]{1to8}
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx + 508]{1to8}
+
+// CHECK: vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x72,0x80]
+ vcvtne2ps2bf16 ymm30, ymm29, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvtneps2bf16 xmm30, xmm29
+// CHECK: encoding: [0x62,0x02,0x7e,0x08,0x72,0xf5]
+ vcvtneps2bf16 xmm30, xmm29
+
+// CHECK: vcvtneps2bf16 xmm30 {k7}, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x7e,0x0f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 xmm30 {k7}, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneps2bf16 xmm30, dword ptr [r9]{1to4}
+// CHECK: encoding: [0x62,0x42,0x7e,0x18,0x72,0x31]
+ vcvtneps2bf16 xmm30, dword ptr [r9]{1to4}
+
+// CHECK: vcvtneps2bf16 xmm30, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0x62,0x7e,0x08,0x72,0x71,0x7f]
+ vcvtneps2bf16 xmm30, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0x62,0x7e,0x9f,0x72,0x72,0x80]
+ vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvtneps2bf16 xmm30, ymm29
+// CHECK: encoding: [0x62,0x02,0x7e,0x28,0x72,0xf5]
+ vcvtneps2bf16 xmm30, ymm29
+
+// CHECK: vcvtneps2bf16 xmm30 {k7}, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x7e,0x2f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 xmm30 {k7}, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneps2bf16 xmm30, dword ptr [r9]{1to8}
+// CHECK: encoding: [0x62,0x42,0x7e,0x38,0x72,0x31]
+ vcvtneps2bf16 xmm30, dword ptr [r9]{1to8}
+
+// CHECK: vcvtneps2bf16 xmm30, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0x62,0x7e,0x28,0x72,0x71,0x7f]
+ vcvtneps2bf16 xmm30, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0x62,0x7e,0xbf,0x72,0x72,0x80]
+ vcvtneps2bf16 xmm30 {k7} {z}, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vdpbf16ps ymm30, ymm29, ymm28
+// CHECK: encoding: [0x62,0x02,0x16,0x20,0x52,0xf4]
+ vdpbf16ps ymm30, ymm29, ymm28
+
+// CHECK: vdpbf16ps ymm30 {k7}, ymm29, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x16,0x27,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps ymm30 {k7}, ymm29, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vdpbf16ps ymm30, ymm29, dword ptr [r9]{1to8}
+// CHECK: encoding: [0x62,0x42,0x16,0x30,0x52,0x31]
+ vdpbf16ps ymm30, ymm29, dword ptr [r9]{1to8}
+
+// CHECK: vdpbf16ps ymm30, ymm29, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0x62,0x16,0x20,0x52,0x71,0x7f]
+ vdpbf16ps ymm30, ymm29, ymmword ptr [rcx + 4064]
+
+// CHECK: vdpbf16ps ymm30 {k7} {z}, ymm29, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0x62,0x16,0xb7,0x52,0x72,0x80]
+ vdpbf16ps ymm30 {k7} {z}, ymm29, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vdpbf16ps xmm30, xmm29, xmm28
+// CHECK: encoding: [0x62,0x02,0x16,0x00,0x52,0xf4]
+ vdpbf16ps xmm30, xmm29, xmm28
+
+// CHECK: vdpbf16ps xmm30 {k7}, xmm29, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0x22,0x16,0x07,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps xmm30 {k7}, xmm29, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vdpbf16ps xmm30, xmm29, dword ptr [r9]{1to4}
+// CHECK: encoding: [0x62,0x42,0x16,0x10,0x52,0x31]
+ vdpbf16ps xmm30, xmm29, dword ptr [r9]{1to4}
+
+// CHECK: vdpbf16ps xmm30, xmm29, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0x62,0x16,0x00,0x52,0x71,0x7f]
+ vdpbf16ps xmm30, xmm29, xmmword ptr [rcx + 2032]
+
+// CHECK: vdpbf16ps xmm30 {k7} {z}, xmm29, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0x62,0x16,0x97,0x52,0x72,0x80]
+ vdpbf16ps xmm30 {k7} {z}, xmm29, dword ptr [rdx - 512]{1to4}
+
Added: llvm/trunk/test/MC/X86/x86-64-avx512_bf16-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512_bf16-encoding.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64-avx512_bf16-encoding.s (added)
+++ llvm/trunk/test/MC/X86/x86-64-avx512_bf16-encoding.s Mon May 6 02:24:36 2019
@@ -0,0 +1,90 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding < %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x02,0x17,0x40,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 {%k7}
+// CHECK: encoding: [0x62,0x02,0x17,0x47,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x02,0x17,0xc7,0x72,0xf4]
+ vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%rcx), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 291(%rax,%r14,8), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%rax,%r14,8), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 268435456(%rax,%r14,8), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x22,0x17,0x40,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%rax,%r14,8), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 -64(%rsp), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -64(%rsp), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 (%rcx){1to16}, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx){1to16}, %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 8128(%rdx), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 8128(%rdx), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 -8192(%rdx), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x40,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -8192(%rdx), %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 508(%rdx){1to16}, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%rdx){1to16}, %zmm29, %zmm30
+
+// CHECK: vcvtne2ps2bf16 -512(%rdx){1to16}, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x50,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%rdx){1to16}, %zmm29, %zmm30
+
+// CHECK: vcvtneps2bf16 %zmm29, %ymm30
+// CHECK: encoding: [0x62,0x02,0x7e,0x48,0x72,0xf5]
+ vcvtneps2bf16 %zmm29, %ymm30
+
+// CHECK: vcvtneps2bf16 268435456(%rbp,%r14,8), %ymm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x7e,0x4f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16 268435456(%rbp,%r14,8), %ymm30 {%k7}
+
+// CHECK: vcvtneps2bf16 (%r9){1to16}, %ymm30
+// CHECK: encoding: [0x62,0x42,0x7e,0x58,0x72,0x31]
+ vcvtneps2bf16 (%r9){1to16}, %ymm30
+
+// CHECK: vcvtneps2bf16 8128(%rcx), %ymm30
+// CHECK: encoding: [0x62,0x62,0x7e,0x48,0x72,0x71,0x7f]
+ vcvtneps2bf16 8128(%rcx), %ymm30
+
+// CHECK: vcvtneps2bf16 -512(%rdx){1to16}, %ymm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x7e,0xdf,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%rdx){1to16}, %ymm30 {%k7} {z}
+
+// CHECK: vdpbf16ps %zmm28, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x02,0x16,0x40,0x52,0xf4]
+ vdpbf16ps %zmm28, %zmm29, %zmm30
+
+// CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %zmm29, %zmm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x16,0x47,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%rbp,%r14,8), %zmm29, %zmm30 {%k7}
+
+// CHECK: vdpbf16ps (%r9){1to16}, %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x42,0x16,0x50,0x52,0x31]
+ vdpbf16ps (%r9){1to16}, %zmm29, %zmm30
+
+// CHECK: vdpbf16ps 8128(%rcx), %zmm29, %zmm30
+// CHECK: encoding: [0x62,0x62,0x16,0x40,0x52,0x71,0x7f]
+ vdpbf16ps 8128(%rcx), %zmm29, %zmm30
+
+// CHECK: vdpbf16ps -512(%rdx){1to16}, %zmm29, %zmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x16,0xd7,0x52,0x72,0x80]
+ vdpbf16ps -512(%rdx){1to16}, %zmm29, %zmm30 {%k7} {z}
+
Added: llvm/trunk/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s?rev=360022&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s (added)
+++ llvm/trunk/test/MC/X86/x86-64-avx512_bf16_vl-encoding.s Mon May 6 02:24:36 2019
@@ -0,0 +1,178 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding < %s | FileCheck %s
+
+// CHECK: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x02,0x17,0x00,0x72,0xf4]
+ vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7}
+// CHECK: encoding: [0x62,0x02,0x17,0x07,0x72,0xf4]
+ vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x02,0x17,0x87,0x72,0xf4]
+ vcvtne2ps2bf16 %xmm28, %xmm29, %xmm30 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%rcx), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 291(%rax,%r14,8), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%rax,%r14,8), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 268435456(%rax,%r14,8), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x22,0x17,0x00,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%rax,%r14,8), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 -16(%rsp), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -16(%rsp), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 (%rcx){1to4}, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx){1to4}, %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 2032(%rdx), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 2032(%rdx), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 -2048(%rdx), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x00,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -2048(%rdx), %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 508(%rdx){1to4}, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%rdx){1to4}, %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 -512(%rdx){1to4}, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x17,0x10,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%rdx){1to4}, %xmm29, %xmm30
+
+// CHECK: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x02,0x17,0x20,0x72,0xf4]
+ vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7}
+// CHECK: encoding: [0x62,0x02,0x17,0x27,0x72,0xf4]
+ vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7}
+
+// CHECK: vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x02,0x17,0xa7,0x72,0xf4]
+ vcvtne2ps2bf16 %ymm28, %ymm29, %ymm30 {%k7} {z}
+
+// CHECK: vcvtne2ps2bf16 (%rcx), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 291(%rax,%r14,8), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x23,0x01,0x00,0x00]
+ vcvtne2ps2bf16 291(%rax,%r14,8), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 268435456(%rax,%r14,8), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x22,0x17,0x20,0x72,0xb4,0xf0,0x00,0x00,0x00,0x10]
+ vcvtne2ps2bf16 268435456(%rax,%r14,8), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 -32(%rsp), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x74,0x24,0xff]
+ vcvtne2ps2bf16 -32(%rsp), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 (%rcx){1to8}, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x31]
+ vcvtne2ps2bf16 (%rcx){1to8}, %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 4064(%rdx), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 4064(%rdx), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 -4096(%rdx), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x20,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -4096(%rdx), %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 508(%rdx){1to8}, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x72,0x7f]
+ vcvtne2ps2bf16 508(%rdx){1to8}, %ymm29, %ymm30
+
+// CHECK: vcvtne2ps2bf16 -512(%rdx){1to8}, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x17,0x30,0x72,0x72,0x80]
+ vcvtne2ps2bf16 -512(%rdx){1to8}, %ymm29, %ymm30
+
+// CHECK: vcvtneps2bf16 %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x02,0x7e,0x08,0x72,0xf5]
+ vcvtneps2bf16 %xmm29, %xmm30
+
+// CHECK: vcvtneps2bf16x 268435456(%rbp,%r14,8), %xmm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x7e,0x0f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16x 268435456(%rbp,%r14,8), %xmm30 {%k7}
+
+// CHECK: vcvtneps2bf16 (%r9){1to4}, %xmm30
+// CHECK: encoding: [0x62,0x42,0x7e,0x18,0x72,0x31]
+ vcvtneps2bf16 (%r9){1to4}, %xmm30
+
+// CHECK: vcvtneps2bf16x 2032(%rcx), %xmm30
+// CHECK: encoding: [0x62,0x62,0x7e,0x08,0x72,0x71,0x7f]
+ vcvtneps2bf16x 2032(%rcx), %xmm30
+
+// CHECK: vcvtneps2bf16 -512(%rdx){1to4}, %xmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x7e,0x9f,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%rdx){1to4}, %xmm30 {%k7} {z}
+
+// CHECK: vcvtneps2bf16 %ymm29, %xmm30
+// CHECK: encoding: [0x62,0x02,0x7e,0x28,0x72,0xf5]
+ vcvtneps2bf16 %ymm29, %xmm30
+
+// CHECK: vcvtneps2bf16y 268435456(%rbp,%r14,8), %xmm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x7e,0x2f,0x72,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneps2bf16y 268435456(%rbp,%r14,8), %xmm30 {%k7}
+
+// CHECK: vcvtneps2bf16 (%r9){1to8}, %xmm30
+// CHECK: encoding: [0x62,0x42,0x7e,0x38,0x72,0x31]
+ vcvtneps2bf16 (%r9){1to8}, %xmm30
+
+// CHECK: vcvtneps2bf16y 4064(%rcx), %xmm30
+// CHECK: encoding: [0x62,0x62,0x7e,0x28,0x72,0x71,0x7f]
+ vcvtneps2bf16y 4064(%rcx), %xmm30
+
+// CHECK: vcvtneps2bf16 -512(%rdx){1to8}, %xmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x7e,0xbf,0x72,0x72,0x80]
+ vcvtneps2bf16 -512(%rdx){1to8}, %xmm30 {%k7} {z}
+
+// CHECK: vdpbf16ps %ymm28, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x02,0x16,0x20,0x52,0xf4]
+ vdpbf16ps %ymm28, %ymm29, %ymm30
+
+// CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %ymm29, %ymm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x16,0x27,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%rbp,%r14,8), %ymm29, %ymm30 {%k7}
+
+// CHECK: vdpbf16ps (%r9){1to8}, %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x42,0x16,0x30,0x52,0x31]
+ vdpbf16ps (%r9){1to8}, %ymm29, %ymm30
+
+// CHECK: vdpbf16ps 4064(%rcx), %ymm29, %ymm30
+// CHECK: encoding: [0x62,0x62,0x16,0x20,0x52,0x71,0x7f]
+ vdpbf16ps 4064(%rcx), %ymm29, %ymm30
+
+// CHECK: vdpbf16ps -512(%rdx){1to8}, %ymm29, %ymm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x16,0xb7,0x52,0x72,0x80]
+ vdpbf16ps -512(%rdx){1to8}, %ymm29, %ymm30 {%k7} {z}
+
+// CHECK: vdpbf16ps %xmm28, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x02,0x16,0x00,0x52,0xf4]
+ vdpbf16ps %xmm28, %xmm29, %xmm30
+
+// CHECK: vdpbf16ps 268435456(%rbp,%r14,8), %xmm29, %xmm30 {%k7}
+// CHECK: encoding: [0x62,0x22,0x16,0x07,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vdpbf16ps 268435456(%rbp,%r14,8), %xmm29, %xmm30 {%k7}
+
+// CHECK: vdpbf16ps (%r9){1to4}, %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x42,0x16,0x10,0x52,0x31]
+ vdpbf16ps (%r9){1to4}, %xmm29, %xmm30
+
+// CHECK: vdpbf16ps 2032(%rcx), %xmm29, %xmm30
+// CHECK: encoding: [0x62,0x62,0x16,0x00,0x52,0x71,0x7f]
+ vdpbf16ps 2032(%rcx), %xmm29, %xmm30
+
+// CHECK: vdpbf16ps -512(%rdx){1to4}, %xmm29, %xmm30 {%k7} {z}
+// CHECK: encoding: [0x62,0x62,0x16,0x97,0x52,0x72,0x80]
+ vdpbf16ps -512(%rdx){1to4}, %xmm29, %xmm30 {%k7} {z}
+
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