[llvm] r359905 - [hexagon] change AsmParser assertion to error
Brian Cain via llvm-commits
llvm-commits at lists.llvm.org
Fri May 3 09:50:38 PDT 2019
Author: bcain
Date: Fri May 3 09:50:38 2019
New Revision: 359905
URL: http://llvm.org/viewvc/llvm-project?rev=359905&view=rev
Log:
[hexagon] change AsmParser assertion to error
For immediates that can't be evaluated in assembler-mapped instructions, we
should return 'invalid operand' instead of assert.
Added:
llvm/trunk/test/MC/Hexagon/hex-immediates.s
llvm/trunk/test/MC/Hexagon/inval_immed.s
Modified:
llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
Modified: llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp?rev=359905&r1=359904&r2=359905&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp Fri May 3 09:50:38 2019
@@ -1683,8 +1683,8 @@ int HexagonAsmParser::processInstruction
int64_t Value;
MCExpr const &Expr = *Imm.getExpr();
bool Absolute = Expr.evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (!HexagonMCInstrInfo::mustExtend(Expr) &&
((Value <= -256) || Value >= 256))
return Match_InvalidOperand;
@@ -1706,8 +1706,8 @@ int HexagonAsmParser::processInstruction
MCInst TmpInst;
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rd = $Rs
TmpInst.setOpcode(Hexagon::A2_tfr);
MCOperand &Rd = Inst.getOperand(0);
@@ -1736,8 +1736,8 @@ int HexagonAsmParser::processInstruction
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rdd = combine ($Rs[0], $Rs[1])
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
@@ -1860,8 +1860,8 @@ int HexagonAsmParser::processInstruction
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0)
Inst.setOpcode(Hexagon::S2_vsathub);
else {
@@ -1880,8 +1880,8 @@ int HexagonAsmParser::processInstruction
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) {
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
Added: llvm/trunk/test/MC/Hexagon/hex-immediates.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/hex-immediates.s?rev=359905&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/hex-immediates.s (added)
+++ llvm/trunk/test/MC/Hexagon/hex-immediates.s Fri May 3 09:50:38 2019
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -arch=hexagon %s | llvm-objdump -d --print-imm-hex - | FileCheck %s
+
+# CHECK: r3 = ##0x70000240
+r3 = ##1879048768
+# CHECK: r3 = ##-0x70000240
+r3 = ##-1879048768
Added: llvm/trunk/test/MC/Hexagon/inval_immed.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/inval_immed.s?rev=359905&view=auto
==============================================================================
--- llvm/trunk/test/MC/Hexagon/inval_immed.s (added)
+++ llvm/trunk/test/MC/Hexagon/inval_immed.s Fri May 3 09:50:38 2019
@@ -0,0 +1,6 @@
+# RUN: not llvm-mc -filetype=asm -arch=hexagon %s 2>%t; FileCheck %s < %t
+
+ .text
+r0 = mpyi(r0,#m9)
+
+# CHECK: error: invalid operand for instruction
More information about the llvm-commits
mailing list