[PATCH] D61553: AMDGPU: Fix ds_{read,write}2_b64 on SI/gfx6

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:319
+  if ((CI.InstClass == DS_READ || CI.InstClass == DS_WRITE) &&
+      (OffsetSize == 8 && STM->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS))
+    OffsetSize = 4;
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rampitec wrote:
> Was it really changed in CI?
I doubt this changed, and the manual for SI and gfx9 plainly state it uses 8. This should also not use a hardcoded generation check if this is really true


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61553/new/

https://reviews.llvm.org/D61553