[PATCH] D61553: AMDGPU: Fix ds_{read,write}2_b64 on SI/gfx6

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: arsenm, rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Offsets for these instructions are in dwords, like for the b32 variants.

This is exposed by a combination of:

- better load / store vectorization in LLVM
- an in-flight change in Mesa to specify an increased alignment for LDS in compute shaders, which enables more vectorization opportunities

This has been observed on real hardware in the following tests:

- dEQP-GLES31.functional.compute.shared_var.basic_type.mat4_{lowp,mediump,highp}
- dEQP-GLES31.functional.compute.shared_var.work_group_size.mat4_{64_1_1, 1_64_1, 1_1_64}

Change-Id: I63c20afd1467b126199be2891ab45451b0430103


Repository:
  rL LLVM

https://reviews.llvm.org/D61553

Files:
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/load-local-i16.ll
  test/CodeGen/AMDGPU/load-local-i32.ll
  test/CodeGen/AMDGPU/load-local-i8.ll
  test/CodeGen/AMDGPU/local-64.ll

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