[PATCH] D61546: Stop the DAG combiner from combining vector stores greater than preferred vector width...

Hal Finkel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat May 4 01:25:28 PDT 2019

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hfinkel added a comment.

Seems reasonable to me. Can have have both a 128- and 256-bit test case?


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