[llvm] r359896 - [x86] add tests for fneg with undefs; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri May 3 08:09:53 PDT 2019
Author: spatel
Date: Fri May 3 08:09:53 2019
New Revision: 359896
URL: http://llvm.org/viewvc/llvm-project?rev=359896&view=rev
Log:
[x86] add tests for fneg with undefs; NFC
This was originally part of D61419.
Modified:
llvm/trunk/test/CodeGen/X86/vec_fneg.ll
Modified: llvm/trunk/test/CodeGen/X86/vec_fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fneg.ll?rev=359896&r1=359895&r2=359896&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fneg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fneg.ll Fri May 3 08:09:53 2019
@@ -21,6 +21,74 @@ define <4 x float> @t1(<4 x float> %Q) n
ret <4 x float> %tmp
}
+; Possibly misplaced test, but since we're checking undef scenarios...
+
+define float @scalar_fsub_neg0_undef(float %x) nounwind {
+; X32-SSE1-LABEL: scalar_fsub_neg0_undef:
+; X32-SSE1: # %bb.0:
+; X32-SSE1-NEXT: pushl %eax
+; X32-SSE1-NEXT: xorps {{\.LCPI.*}}, %xmm0
+; X32-SSE1-NEXT: movss %xmm0, (%esp)
+; X32-SSE1-NEXT: flds (%esp)
+; X32-SSE1-NEXT: popl %eax
+; X32-SSE1-NEXT: retl
+;
+; X32-SSE2-LABEL: scalar_fsub_neg0_undef:
+; X32-SSE2: # %bb.0:
+; X32-SSE2-NEXT: pushl %eax
+; X32-SSE2-NEXT: movss %xmm0, (%esp)
+; X32-SSE2-NEXT: flds (%esp)
+; X32-SSE2-NEXT: popl %eax
+; X32-SSE2-NEXT: retl
+;
+; X64-SSE1-LABEL: scalar_fsub_neg0_undef:
+; X64-SSE1: # %bb.0:
+; X64-SSE1-NEXT: xorps {{.*}}(%rip), %xmm0
+; X64-SSE1-NEXT: retq
+;
+; X64-SSE2-LABEL: scalar_fsub_neg0_undef:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: retq
+ %r = fsub float -0.0, undef
+ ret float %r
+}
+
+define <4 x float> @fsub_neg0_undef(<4 x float> %Q) nounwind {
+; X32-SSE1-LABEL: fsub_neg0_undef:
+; X32-SSE1: # %bb.0:
+; X32-SSE1-NEXT: xorps {{\.LCPI.*}}, %xmm0
+; X32-SSE1-NEXT: retl
+;
+; X32-SSE2-LABEL: fsub_neg0_undef:
+; X32-SSE2: # %bb.0:
+; X32-SSE2-NEXT: retl
+;
+; X64-SSE1-LABEL: fsub_neg0_undef:
+; X64-SSE1: # %bb.0:
+; X64-SSE1-NEXT: xorps {{.*}}(%rip), %xmm0
+; X64-SSE1-NEXT: retq
+;
+; X64-SSE2-LABEL: fsub_neg0_undef:
+; X64-SSE2: # %bb.0:
+; X64-SSE2-NEXT: retq
+ %tmp = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, undef
+ ret <4 x float> %tmp
+}
+
+define <4 x float> @fsub_neg0_undef_elts_undef(<4 x float> %x) {
+; X32-SSE-LABEL: fsub_neg0_undef_elts_undef:
+; X32-SSE: # %bb.0:
+; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = <NaN,u,u,NaN>
+; X32-SSE-NEXT: retl
+;
+; X64-SSE-LABEL: fsub_neg0_undef_elts_undef:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = <NaN,u,u,NaN>
+; X64-SSE-NEXT: retq
+ %r = fsub <4 x float> <float -0.0, float undef, float undef, float -0.0>, undef
+ ret <4 x float> %r
+}
+
; This test verifies that we generate an FP subtraction because "0.0 - x" is not an fneg.
define <4 x float> @t2(<4 x float> %Q) nounwind {
; X32-SSE-LABEL: t2:
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