[PATCH] D61398: [SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635)

[Tim Northover via Phabricator via llvm-commits]

t.p.northover accepted this revision.
t.p.northover added a comment.
This revision is now accepted and ready to land.

> I'm using sign bits to detect that, is there a better way to do that?

Unfortunately, not that I can think of. So I think this looks good.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D61398/new/

https://reviews.llvm.org/D61398