[PATCH] D61411: [SelectionDAG] Expand ADD/SUBCARRY
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 2 10:44:27 PDT 2019
efriedma added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3292
+ // Add of the sum and the carry.
+ SDValue CarryExt = DAG.getZExtOrTrunc(Carry, dl, VT);
+ SDValue Sum2 = DAG.getNode(Op, dl, VT, Sum, CarryExt);
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Looking at this again, it isn't quite right. In general, on targets where getBooleanContents does not return ZeroOrOneBooleanContent, you need to getZeroExtendInReg to convert a carry bit to 1/0.
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D61411/new/
https://reviews.llvm.org/D61411
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