[PATCH] D61330: [AMDGPU] gfx1010 VMEM and SMEM implementation

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 30 11:50:34 PDT 2019 

rampitec created this revision.
rampitec added reviewers: kzhuravl, msearles.
Herald added subscribers: Petar.Avramovic, jfb, arphaman, javed.absar, eraman, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, arsenm, qcolombet.

https://reviews.llvm.org/D61330

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  lib/Target/AMDGPU/AMDGPUISelLowering.h
  lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  lib/Target/AMDGPU/BUFInstructions.td
  lib/Target/AMDGPU/FLATInstructions.td
  lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
  lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h
  lib/Target/AMDGPU/SIFixupVectorISel.cpp
  lib/Target/AMDGPU/SIFrameLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  lib/Target/AMDGPU/SMInstructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
  test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
  test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
  test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
  test/CodeGen/AMDGPU/clamp-omod-special-case.mir
  test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
  test/CodeGen/AMDGPU/cluster-flat-loads.mir
  test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
  test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
  test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
  test/CodeGen/AMDGPU/coalescer-subreg-join.mir
  test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
  test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
  test/CodeGen/AMDGPU/collapse-endcf.mir
  test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
  test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
  test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
  test/CodeGen/AMDGPU/dead-lane.mir
  test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
  test/CodeGen/AMDGPU/dead_copy.mir
  test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
  test/CodeGen/AMDGPU/endpgm-dce.mir
  test/CodeGen/AMDGPU/flat-load-clustering.mir
  test/CodeGen/AMDGPU/flat-offset-bug.ll
  test/CodeGen/AMDGPU/fold-imm-copy.mir
  test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
  test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
  test/CodeGen/AMDGPU/fold-multiple.mir
  test/CodeGen/AMDGPU/global-load-store-atomics.mir
  test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
  test/CodeGen/AMDGPU/hazard-inlineasm.mir
  test/CodeGen/AMDGPU/hazard-kill.mir
  test/CodeGen/AMDGPU/indirect-addressing-term.ll
  test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
  test/CodeGen/AMDGPU/inserted-wait-states.mir
  test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
  test/CodeGen/AMDGPU/limit-coalesce.mir
  test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
  test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
  test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
  test/CodeGen/AMDGPU/memory-legalizer-local.mir
  test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
  test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
  test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
  test/CodeGen/AMDGPU/memory-legalizer-region.mir
  test/CodeGen/AMDGPU/memory_clause.mir
  test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
  test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
  test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
  test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
  test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
  test/CodeGen/AMDGPU/readlane_exec0.mir
  test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
  test/CodeGen/AMDGPU/regcoal-subrange-join.mir
  test/CodeGen/AMDGPU/regcoalesce-dbg.mir
  test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
  test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
  test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
  test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
  test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
  test/CodeGen/AMDGPU/schedule-regpressure.mir
  test/CodeGen/AMDGPU/sdwa-gfx9.mir
  test/CodeGen/AMDGPU/sdwa-ops.mir
  test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
  test/CodeGen/AMDGPU/sdwa-preserve.mir
  test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
  test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir
  test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
  test/CodeGen/AMDGPU/shrink-carry.mir
  test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
  test/CodeGen/AMDGPU/si-lower-control-flow.mir
  test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
  test/CodeGen/AMDGPU/smrd-fold-offset.mir
  test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
  test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
  test/CodeGen/AMDGPU/syncscopes.ll
  test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
  test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
  test/CodeGen/AMDGPU/vmem-vcc-hazard.mir
  test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
  test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
  test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
  test/CodeGen/AMDGPU/waitcnt-preexisting.mir
  test/CodeGen/AMDGPU/waitcnt.mir
  test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
  test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir
  test/CodeGen/MIR/AMDGPU/syncscopes.mir
  test/CodeGen/MIR/AMDGPU/target-index-operands.mir
  test/MC/AMDGPU/flat-gfx10.s
  test/MC/AMDGPU/flat-global.s
  test/MC/AMDGPU/flat-scratch-instructions.s

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