[PATCH] D61411: [SelectionDAG] Expand ADD/SUBCARRY

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM

Please run some basic sanity tests before you merge to make sure this works correctly at runtime.  The code looks right, but I don't really trust that. :)  If you want to test something simpler than smul.fix, might make sense to just temporarily hack legalization for addition to use this codepath, or something like that, so you can easily understand what you're actually testing.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3300
+    SDValue Overflow2 = IsAdd ? DAG.getSetCC(dl, VT, Sum2, Zero, ISD::SETEQ)
+                              : DAG.getSetCC(dl, VT, Sum, Zero, ISD::SETEQ);
+
----------------
leonardchan wrote:
> efriedma wrote:
> > Are you sure this is right?  The comment is correct, but there's only an overflow if the carry is set and the result is zero.
> My bad, you're right. Updated.
Looks okay now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61411/new/

https://reviews.llvm.org/D61411