[PATCH] D61400: [SelectionDAG] Utilize ARM shift behavior

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

>> I was under the impression that the shift was by the bottom byte amount. i.e the mask is 255, and a shift of 256 is the same as a shift of 0. I have not tried it though.
> 
> This is true for NEON vectors, not scalars, as far as I can tell.

The 8.1-m armarm seems to claim for LSL "The variable number of bits is read from the bottom byte of a register". It's an alias for MOV and there's a "shift_n = UInt(R[s]<7:0>);" in the pseudo code. I have been know to mis-read these things in the past though..

It's not the end of the world, but would mean that we would need to know that the shift amount is less that 256 as far as I understand.


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https://reviews.llvm.org/D61400