[PATCH] D61400: [SelectionDAG] Utilize ARM shift behavior

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Hello

I was under the impression that the shift was by the bottom byte amount. i.e the mask is 255, and a shift of 256 is the same as a shift of 0. I hve not tried it though.

For aarch64 the mask may to be the size of the datatype. The armarm will contain the correct information if you can decipher the pseudo code.


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  rL LLVM

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https://reviews.llvm.org/D61400