[llvm] r359709 - [PowerPC] add test that could infinite loop with reordered transforms; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Wed May  1 10:34:30 2019
New Revision: 359709

URL: http://llvm.org/viewvc/llvm-project?rev=359709&view=rev
Log:
[PowerPC] add test that could infinite loop with reordered transforms; NFC

This is a slightly reduced version of the test from D61384.
Adding this as a preliminary step, so I can update D61149 with
the proposed fix.

Added:
    llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll

Added: llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll?rev=359709&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll Wed May  1 10:34:30 2019
@@ -0,0 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s
+
+define <4 x float> @repeated_fp_divisor(float %a, <4 x float> %b) {
+; CHECK-LABEL: repeated_fp_divisor:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xscvdpspn 0, 1
+; CHECK-NEXT:    addis 3, 2, .LCPI0_0 at toc@ha
+; CHECK-NEXT:    addi 3, 3, .LCPI0_0 at toc@l
+; CHECK-NEXT:    lvx 3, 0, 3
+; CHECK-NEXT:    addis 3, 2, .LCPI0_1 at toc@ha
+; CHECK-NEXT:    addi 3, 3, .LCPI0_1 at toc@l
+; CHECK-NEXT:    lvx 4, 0, 3
+; CHECK-NEXT:    xxspltw 0, 0, 0
+; CHECK-NEXT:    xvresp 1, 0
+; CHECK-NEXT:    xvnmsubasp 35, 1, 0
+; CHECK-NEXT:    xvmulsp 0, 34, 36
+; CHECK-NEXT:    xvmaddasp 1, 1, 35
+; CHECK-NEXT:    xvmulsp 34, 0, 1
+; CHECK-NEXT:    blr
+  %ins = insertelement <4 x float> undef, float %a, i32 0
+  %splat = shufflevector <4 x float> %ins, <4 x float> undef, <4 x i32> zeroinitializer
+  %t1 = fmul fast <4 x float> %b, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0x3FF028F5C0000000>
+  %mul = fdiv fast <4 x float> %t1, %splat
+  ret <4 x float> %mul
+}
+