[PATCH] D61052: [compiler-rt][builtins] Implement some fetch-and-x operations for Cortex-M

Ayke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 30 11:42:13 PDT 2019


aykevl planned changes to this revision.
aykevl added a comment.

> No there isn't any reason to avoid ldrex/strex on M-class. It is the recommended way of implementing these functions on all architectures that support them.

Ok, I'll update the code to use ldrex/strex on armv7m and up for 32-bit operations. I don't see a way of using ldrex/strex for 64-bit operations on any of the Cortex-M devices, though (unless the more capable ones have 64-bit ldrex/strex instructions).

> I haven't really done any systems programming on ARM, so I'm not sure what the consequences of the sequence you use for enabling/disabling interrupts might be. Is it reasonable for a library to turn off interrupts for a few cycles?

I have been thinking about this as well but if the only possible implementation is by disabling interrupts, I think we should do that. If anyone knows a better way on Cortex-M0 please tell.

> I'm struggling to think of a use case of an asynchronous interrupt that would disable further interrupts and rely on some other (non interrupt) part of the code to re-enable them.

That was my thinking as well. Although it is possible, I think it would be bad practice. Many RTOSes have macros for disabling/enabling interrupts using the same pattern.

> One other point, are these files compiled for cortex-m0?

Good point, will take a look. I haven't used the CMake-based built system for my application so I didn't need it but will make sure it works with it.


Repository:
  rCRT Compiler Runtime

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61052/new/

https://reviews.llvm.org/D61052





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