[PATCH] D56772: [MIR] Add simple PRE pass to MachineCSE

[Anton Afanasyev via Phabricator via llvm-commits]

anton-afanasyev updated this revision to Diff 197328.
anton-afanasyev added a comment.

Small fix and tests update


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56772/new/

https://reviews.llvm.org/D56772

Files:
  llvm/lib/CodeGen/MachineCSE.cpp
  llvm/test/CodeGen/Mips/internalfunc.ll
  llvm/test/CodeGen/X86/avx2-masked-gather.ll
  llvm/test/CodeGen/X86/masked_compressstore.ll
  llvm/test/CodeGen/X86/masked_gather.ll
  llvm/test/CodeGen/X86/masked_store.ll
  llvm/test/CodeGen/X86/masked_store_trunc.ll
  llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
  llvm/test/CodeGen/X86/masked_store_trunc_usat.ll

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