[PATCH] D61290: globalisel][aarch64] Make G_SEXT_INREG legal from all bit sizes to s32/s64

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
dsanders added reviewers: bogner, aditya_nandakumar, volkan, aemerson, paquette, arsenm.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, javed.absar, rovka, wdng.
Herald added a project: LLVM.

I had hoped to demonstrate selectively marking certain bit sizes legal but
it turns out AArch64 supports them all via SBFM/UBFM. Added a unit test to
demonstrate that instead. Targets with more limited support for bit sizes
can use .legalForTypeWithImm({{s32, 8}, {s32, 16}}).lower() and similar to
keep G_SEXT_INREG for certain sizes and lower to shifts for others.

Depends on D61289 <https://reviews.llvm.org/D61289>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D61290

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-int-ext.mir
  llvm/test/CodeGen/AArch64/arm64-fastisel-gep-promote-before-add.ll
  llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp

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