[PATCH] D61052: [compiler-rt][builtins] Implement some fetch-and-x operations for Cortex-M

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Is there any reason to avoid 32-bit ldrex/strex on M-class processors other than Cortex-M0?

I haven't really done any systems programming on ARM, so I'm not sure what the consequences of the sequence you use for enabling/disabling interrupts might be.  Is it reasonable for a library to turn off interrupts for a few cycles?  Is it possible that the value of primask might change after the mrs, but before the cpsid instruction?


Repository:
  rCRT Compiler Runtime

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  https://reviews.llvm.org/D61052/new/

https://reviews.llvm.org/D61052