[PATCH] D61259: AArch64: support arm64_32, an ILP32 slice for watchOS.

[Tim Northover via Phabricator via llvm-commits]

t.p.northover created this revision.
Herald added subscribers: dang, jfb, arphaman, dexonsmith, steven_wu, hiraditya, kristof.beyls, eraman, javed.absar, mcrosier, mehdi_amini.
Herald added a project: LLVM.
t.p.northover added parent revisions: D61258: AArch64: support binutils-like things on arm64_32., D58982: DAG: allow DAG pointer size different from memory  representation..

This is the main CodeGen patch to support the arm64_32 watchOS ABI on the LLVM side.

FastISel is mostly disabled for now since it would generate incorrect code for ILP32. Disabling it also allows for a more incremental approach to implementing that side since we have sensible fallbacks in place.


Repository:
  rL LLVM

https://reviews.llvm.org/D61259

Files:
  llvm/include/llvm/CodeGen/CallingConvLower.h
  llvm/include/llvm/Target/TargetCallingConv.td
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
  llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
  llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
  llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp
  llvm/lib/LTO/LTOCodeGenerator.cpp
  llvm/lib/LTO/LTOModule.cpp
  llvm/lib/LTO/ThinLTOCodeGenerator.cpp
  llvm/lib/MC/MCObjectFileInfo.cpp
  llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
  llvm/lib/Target/AArch64/AArch64CallLowering.cpp
  llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
  llvm/lib/Target/AArch64/AArch64CallingConvention.h
  llvm/lib/Target/AArch64/AArch64CallingConvention.td
  llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/AArch64/AArch64FastISel.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
  llvm/lib/Target/X86/X86FastISel.cpp
  llvm/test/CodeGen/AArch64/arm64-aapcs.ll
  llvm/test/CodeGen/AArch64/arm64-collect-loh-garbage-crash.ll
  llvm/test/CodeGen/AArch64/arm64-collect-loh-str.ll
  llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
  llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
  llvm/test/CodeGen/AArch64/arm64-stacksave.ll
  llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
  llvm/test/CodeGen/AArch64/arm64_32-addrs.ll
  llvm/test/CodeGen/AArch64/arm64_32-atomics.ll
  llvm/test/CodeGen/AArch64/arm64_32-fastisel.ll
  llvm/test/CodeGen/AArch64/arm64_32-frame-pointers.ll
  llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
  llvm/test/CodeGen/AArch64/arm64_32-memcpy.ll
  llvm/test/CodeGen/AArch64/arm64_32-neon.ll
  llvm/test/CodeGen/AArch64/arm64_32-null.ll
  llvm/test/CodeGen/AArch64/arm64_32-pointer-extend.ll
  llvm/test/CodeGen/AArch64/arm64_32-stack-pointers.ll
  llvm/test/CodeGen/AArch64/arm64_32-tls.ll
  llvm/test/CodeGen/AArch64/arm64_32-va.ll
  llvm/test/CodeGen/AArch64/arm64_32.ll
  llvm/test/CodeGen/AArch64/fastcc-reserved.ll
  llvm/test/CodeGen/AArch64/fastcc.ll
  llvm/test/CodeGen/AArch64/jump-table-32.ll
  llvm/test/CodeGen/AArch64/or-combine.ll
  llvm/test/CodeGen/AArch64/sibling-call.ll
  llvm/test/CodeGen/AArch64/swift-return.ll
  llvm/test/CodeGen/AArch64/swiftcc.ll
  llvm/test/CodeGen/AArch64/swifterror.ll
  llvm/test/CodeGen/AArch64/swiftself.ll
  llvm/test/CodeGen/AArch64/tail-call.ll
  llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
  llvm/test/CodeGen/AArch64/win64_vararg.ll
  llvm/test/MC/AArch64/arm64_32-compact-unwind.s
  llvm/utils/TableGen/CallingConvEmitter.cpp

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