[PATCH] D61257: [CostModel][X86] Reduce masked load/store AVX1/AVX2 costs

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

This sounds good for `@llvm.masked.load`, but not `@llvm.masked.store`.

As per https://www.agner.org/optimize/instruction_tables.pdf, even ryzen has crazy high costs for masked store, at ~30.
And that distinction seems consistent with other CPU's.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61257/new/

https://reviews.llvm.org/D61257