[llvm] r359399 - [SelectionDAG] include FP min/max variants as binary operators

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Sun Apr 28 06:19:29 2019
New Revision: 359399

URL: http://llvm.org/viewvc/llvm-project?rev=359399&view=rev
Log:
[SelectionDAG] include FP min/max variants as binary operators

The x86 test diffs don't look great because of extra move ops,
but FP min/max should clearly be included in the list.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/test/CodeGen/X86/extract-fp.ll

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=359399&r1=359398&r2=359399&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Sun Apr 28 06:19:29 2019
@@ -2588,8 +2588,7 @@ namespace ISD {
       cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
   }
 
-  /// Return true if the node is a math/logic binary operator. This corresponds
-  /// to the IR function of the same name.
+  /// Return true if the node is a math/logic binary operator.
   inline bool isBinaryOp(const SDNode *N) {
     auto Op = N->getOpcode();
     return (Op == ISD::ADD || Op == ISD::SUB || Op == ISD::MUL ||
@@ -2597,7 +2596,10 @@ namespace ISD {
             Op == ISD::SHL || Op == ISD::SRL || Op == ISD::SRA ||
             Op == ISD::SDIV || Op == ISD::UDIV || Op == ISD::SREM ||
             Op == ISD::UREM || Op == ISD::FADD || Op == ISD::FSUB ||
-            Op == ISD::FMUL || Op == ISD::FDIV || Op == ISD::FREM);
+            Op == ISD::FMUL || Op == ISD::FDIV || Op == ISD::FREM ||
+            Op == ISD::FMINNUM || Op == ISD::FMAXNUM ||
+            Op == ISD::FMINNUM_IEEE || Op == ISD::FMAXNUM_IEEE ||
+            Op == ISD::FMAXIMUM || Op == ISD::FMINIMUM);
   }
 
   /// Attempt to match a unary predicate against a scalar/splat constant or

Modified: llvm/trunk/test/CodeGen/X86/extract-fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/extract-fp.ll?rev=359399&r1=359398&r2=359399&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/extract-fp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/extract-fp.ll Sun Apr 28 06:19:29 2019
@@ -86,14 +86,16 @@ define float @ext_frem_v4f32_constant_op
 define float @ext_maxnum_v4f32(<4 x float> %x) nounwind {
 ; CHECK-LABEL: ext_maxnum_v4f32:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movaps {{.*#+}} xmm1 = [0.0E+0,1.0E+0,2.0E+0,3.0E+0]
-; CHECK-NEXT:    movaps %xmm1, %xmm2
-; CHECK-NEXT:    maxps %xmm0, %xmm2
-; CHECK-NEXT:    cmpunordps %xmm0, %xmm0
-; CHECK-NEXT:    andps %xmm0, %xmm1
-; CHECK-NEXT:    andnps %xmm2, %xmm0
-; CHECK-NEXT:    orps %xmm1, %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; CHECK-NEXT:    movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; CHECK-NEXT:    movhlps {{.*#+}} xmm0 = xmm0[1,1]
+; CHECK-NEXT:    movaps %xmm0, %xmm1
+; CHECK-NEXT:    cmpunordss %xmm0, %xmm1
+; CHECK-NEXT:    movaps %xmm1, %xmm3
+; CHECK-NEXT:    andps %xmm2, %xmm3
+; CHECK-NEXT:    maxss %xmm0, %xmm2
+; CHECK-NEXT:    andnps %xmm2, %xmm1
+; CHECK-NEXT:    orps %xmm3, %xmm1
+; CHECK-NEXT:    movaps %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %v = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float> <float 0.0, float 1.0, float 2.0, float 3.0>)
   %r = extractelement <4 x float> %v, i32 2
@@ -103,15 +105,16 @@ define float @ext_maxnum_v4f32(<4 x floa
 define double @ext_minnum_v2f64(<2 x double> %x) nounwind {
 ; CHECK-LABEL: ext_minnum_v2f64:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorpd %xmm1, %xmm1
-; CHECK-NEXT:    movhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
-; CHECK-NEXT:    movapd %xmm1, %xmm2
-; CHECK-NEXT:    minpd %xmm0, %xmm1
-; CHECK-NEXT:    cmpunordpd %xmm0, %xmm0
-; CHECK-NEXT:    andpd %xmm0, %xmm2
-; CHECK-NEXT:    andnpd %xmm1, %xmm0
-; CHECK-NEXT:    orpd %xmm2, %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; CHECK-NEXT:    movsd {{.*#+}} xmm2 = mem[0],zero
+; CHECK-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
+; CHECK-NEXT:    movapd %xmm0, %xmm1
+; CHECK-NEXT:    cmpunordsd %xmm0, %xmm1
+; CHECK-NEXT:    movapd %xmm1, %xmm3
+; CHECK-NEXT:    andpd %xmm2, %xmm3
+; CHECK-NEXT:    minsd %xmm0, %xmm2
+; CHECK-NEXT:    andnpd %xmm2, %xmm1
+; CHECK-NEXT:    orpd %xmm3, %xmm1
+; CHECK-NEXT:    movapd %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %v = call <2 x double> @llvm.minnum.v2f64(<2 x double> <double 0.0, double 1.0>, <2 x double> %x)
   %r = extractelement <2 x double> %v, i32 1