[PATCH] D61230: [X86][SSE] Optimize llvm.experimental.vector.reduce.xor.vXi1 parity reduction (PR38840)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 27 23:04:02 PDT 2019


craig.topper added a comment.

LGTM. Can try to replace the xor with 0 as a follow or open a bug?



================
Comment at: test/CodeGen/X86/vector-reduce-xor-bool.ll:26
+; AVX-NEXT:    vmovmskpd %xmm0, %eax
+; AVX-NEXT:    xorb $0, %al
+; AVX-NEXT:    setnp %al
----------------
Would be nice to use "test %al, %al" or "or %al, %al" or "and %al, %al" here which I think would shorter encoding since there would be no immediate.


================
Comment at: test/CodeGen/X86/vector-reduce-xor-bool.ll:36
+; AVX512BW-NEXT:    andl $3, %eax
+; AVX512BW-NEXT:    xorb $0, %al
+; AVX512BW-NEXT:    setnp %al
----------------
Would be nice to use the flags from the and.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61230/new/

https://reviews.llvm.org/D61230





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