[PATCH] D61124: Fix alignment in AArch64InstructionSelector::emitConstantPoolEntry()

[Hans Wennborg via Phabricator via llvm-commits]

This revision was not accepted when it landed; it landed in state "Needs Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rL359287: Fix alignment in AArch64InstructionSelector::emitConstantPoolEntry() (authored by hans, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D61124?vs=196600&id=196816#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61124/new/

https://reviews.llvm.org/D61124

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir


Index: llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
===================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
@@ -82,7 +82,7 @@
     ; CHECK-LABEL: name: shuffle_v4i32
     ; CHECK: constants:
     ; CHECK: value:           '<16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3>'
-    ; CHECK: alignment:       8
+    ; CHECK: alignment:       16
     ; CHECK: isTargetSpecific: false
     ; CHECK: liveins: $q0, $q1
     ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
@@ -117,7 +117,7 @@
     ; CHECK-LABEL: name: shuffle_tbl_v4i32
     ; CHECK: constants:
     ; CHECK: value:           '<16 x i8> <i8 20, i8 21, i8 22, i8 23, i8 28, i8 29, i8 30, i8 31, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3>'
-    ; CHECK: alignment:       8
+    ; CHECK: alignment:       16
     ; CHECK: isTargetSpecific: false
     ; CHECK: liveins: $q0, $q1
     ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
@@ -153,7 +153,7 @@
     ; CHECK-LABEL: name: shuffle_v2i64
     ; CHECK: constants:
     ; CHECK: value:           '<16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>'
-    ; CHECK: alignment:       8
+    ; CHECK: alignment:       16
     ; CHECK: isTargetSpecific: false
     ; CHECK: liveins: $q0, $q1
     ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
Index: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
===================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -2572,7 +2572,7 @@
 unsigned
 AArch64InstructionSelector::emitConstantPoolEntry(Constant *CPVal,
                                                   MachineFunction &MF) const {
-  Type *CPTy = CPVal->getType()->getPointerTo();
+  Type *CPTy = CPVal->getType();
   unsigned Align = MF.getDataLayout().getPrefTypeAlignment(CPTy);
   if (Align == 0)
     Align = MF.getDataLayout().getTypeAllocSize(CPTy);


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D61124.196816.patch
Type: text/x-patch
Size: 2209 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190426/905a53de/attachment.bin>