[PATCH] D61133: [hexagon] change AsmParser assertion to error
Brian Cain via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 25 10:03:22 PDT 2019
bcain updated this revision to Diff 196666.
bcain added a comment.
Added context lines.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D61133/new/
https://reviews.llvm.org/D61133
Files:
llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
llvm/test/MC/Hexagon/hex-immediates.s
llvm/test/MC/Hexagon/inval_immed.s
Index: llvm/test/MC/Hexagon/inval_immed.s
===================================================================
--- /dev/null
+++ llvm/test/MC/Hexagon/inval_immed.s
@@ -0,0 +1,6 @@
+# RUN: not llvm-mc -filetype=asm -arch=hexagon %s 2>%t; FileCheck %s < %t
+
+ .text
+r0=mpyi(r0,#m9)
+
+# CHECK: error: invalid operand for instruction
Index: llvm/test/MC/Hexagon/hex-immediates.s
===================================================================
--- /dev/null
+++ llvm/test/MC/Hexagon/hex-immediates.s
@@ -0,0 +1,6 @@
+# RUN: llvm-mc -filetype=obj -arch=hexagon %s | llvm-objdump -d --print-imm-hex - | FileCheck %s
+
+# CHECK: r3 = ##0x70000240
+r3 = ##1879048768
+# CHECK: r3 = ##-0x70000240
+r3 = ##-1879048768
Index: llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
===================================================================
--- llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -1683,8 +1683,8 @@
int64_t Value;
MCExpr const &Expr = *Imm.getExpr();
bool Absolute = Expr.evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (!HexagonMCInstrInfo::mustExtend(Expr) &&
((Value <= -256) || Value >= 256))
return Match_InvalidOperand;
@@ -1706,8 +1706,8 @@
MCInst TmpInst;
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rd = $Rs
TmpInst.setOpcode(Hexagon::A2_tfr);
MCOperand &Rd = Inst.getOperand(0);
@@ -1736,8 +1736,8 @@
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rdd = combine ($Rs[0], $Rs[1])
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
@@ -1860,8 +1860,8 @@
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0)
Inst.setOpcode(Hexagon::S2_vsathub);
else {
@@ -1880,8 +1880,8 @@
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) {
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
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