[llvm] r359129 - [X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 24 12:28:38 PDT 2019
Author: ctopper
Date: Wed Apr 24 12:28:38 2019
New Revision: 359129
URL: http://llvm.org/viewvc/llvm-project?rev=359129&view=rev
Log:
[X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx.
This can save a 32-bit immediate move.
We would shrink the load and fold it if it was non-volatile, but that's trickier to check for.
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll
llvm/trunk/test/CodeGen/X86/fold-and-shift.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=359129&r1=359128&r2=359129&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Apr 24 12:28:38 2019
@@ -592,6 +592,15 @@ X86DAGToDAGISel::IsProfitableToFold(SDVa
Imm->getAPIntValue().isIntN(32))
return false;
+ // If this really a zext_inreg that can be represented with a movzx
+ // instruction, prefer that.
+ // TODO: We could shrink the load and fold if it is non-volatile.
+ if (U->getOpcode() == ISD::AND &&
+ (Imm->getAPIntValue() == UINT8_MAX ||
+ Imm->getAPIntValue() == UINT16_MAX ||
+ Imm->getAPIntValue() == UINT32_MAX))
+ return false;
+
// ADD/SUB with can negate the immediate and use the opposite operation
// to fit 128 into a sign extended 8 bit immediate.
if ((U->getOpcode() == ISD::ADD || U->getOpcode() == ISD::SUB) &&
Modified: llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll?rev=359129&r1=359128&r2=359129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-29-VolatileBug.ll Wed Apr 24 12:28:38 2019
@@ -8,8 +8,8 @@
define i32 @main() nounwind {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movl $255, %eax
-; CHECK-NEXT: andl g_407, %eax
+; CHECK-NEXT: movl g_407, %eax
+; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: calll func_45
; CHECK-NEXT: addl $4, %esp
Modified: llvm/trunk/test/CodeGen/X86/fold-and-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-and-shift.ll?rev=359129&r1=359128&r2=359129&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-and-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-and-shift.ll Wed Apr 24 12:28:38 2019
@@ -5,8 +5,8 @@ define i32 @t1(i8* %X, i32 %i) {
; CHECK-LABEL: t1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl $255, %ecx
-; CHECK-NEXT: andl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: movzbl %cl, %ecx
; CHECK-NEXT: movl (%eax,%ecx,4), %eax
; CHECK-NEXT: retl
@@ -23,8 +23,8 @@ define i32 @t2(i16* %X, i32 %i) {
; CHECK-LABEL: t2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl $65535, %ecx # imm = 0xFFFF
-; CHECK-NEXT: andl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: movzwl %cx, %ecx
; CHECK-NEXT: movl (%eax,%ecx,4), %eax
; CHECK-NEXT: retl
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