[PATCH] D61019: [AggressiveAntiDepBreaker] Handle predicate operands better

[Hal Finkel via Phabricator via llvm-commits]

hfinkel added a comment.

Why don't we always do this? Isn't assuming that the register is always read the conservatively-correct thing to do here?



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Comment at: include/llvm/CodeGen/TargetInstrInfo.h:1253
+  /// always use its predicate operand.
+  virtual bool isOperandUseGuaranteed(const MachineInstr &MI, unsigned Reg) {
+    return false;
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We'd need to document whether Reg must already occur as a read register in one of the MI's MO, or if this function should simply return false in this case.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D61019/new/

https://reviews.llvm.org/D61019