[PATCH] D60052: Add Connex vector processor back end
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 23 13:29:21 PDT 2019
efriedma added a comment.
Just quickly reviewing the target-independent changes.
In general, commented-out code should be cleaned up.
Could you explain the need for crtNodeMapPtr a bit more? In general, IR instructions should be lowered to SelectionDAG nodes in a way that doesn't require referring back to the original Instruction afterwards.
================
Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:9092
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) const {
+ SDValue Res1 = LowerOperation(SDValue(N, 0), DAG);
----------------
If you have operations with multiple results you need to custom-legalize, your backend should just override LowerOperationWrapper.
================
Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h:41
#include <vector>
+#include "llvm/Support/Debug.h"
----------------
Stray include?
Repository:
rL LLVM
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https://reviews.llvm.org/D60052/new/
https://reviews.llvm.org/D60052
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