[llvm] r358998 - [SPARC] Use the correct register set for the "r" asm constraint.

[Joerg Sonnenberger via llvm-commits]

Author: joerg
Date: Tue Apr 23 08:15:33 2019
New Revision: 358998

URL: http://llvm.org/viewvc/llvm-project?rev=358998&view=rev
Log:
[SPARC] Use the correct register set for the "r" asm constraint.

64bit mode must use 64bit registers, otherwise assumptions about the top
half of the registers are made. Problem found by Takeshi Nakayama in
NetBSD.

Added:
    llvm/trunk/test/CodeGen/SPARC/reg64.ll
Modified:
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=358998&r1=358997&r2=358998&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Tue Apr 23 08:15:33 2019
@@ -3258,6 +3258,8 @@ SparcTargetLowering::getRegForInlineAsmC
     case 'r':
       if (VT == MVT::v2i32)
         return std::make_pair(0U, &SP::IntPairRegClass);
+      else if (Subtarget->is64Bit())
+        return std::make_pair(0U, &SP::I64RegsRegClass);
       else
         return std::make_pair(0U, &SP::IntRegsRegClass);
     case 'f':

Added: llvm/trunk/test/CodeGen/SPARC/reg64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/reg64.ll?rev=358998&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/reg64.ll (added)
+++ llvm/trunk/test/CodeGen/SPARC/reg64.ll Tue Apr 23 08:15:33 2019
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=sparcv9 | FileCheck %s
+
+define dso_local zeroext i32 @f() local_unnamed_addr {
+entry:
+  %0 = tail call i64 asm "", "=r"()
+  %shr = lshr i64 %0, 32
+  %conv = trunc i64 %shr to i32
+  ret i32 %conv
+}
+; CHECK: srlx