[PATCH] D59758: [DAGCombiner] Combine OR as ADD when no common bits are set

[Bjorn Pettersson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL358965: [DAGCombiner] Combine OR as ADD when no common bits are set (authored by bjope, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D59758?vs=194645&id=196203#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59758/new/

https://reviews.llvm.org/D59758

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/AMDGPU/calling-conventions.ll
  llvm/trunk/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  llvm/trunk/test/CodeGen/AMDGPU/sminmax.v2i16.ll
  llvm/trunk/test/CodeGen/AMDGPU/widen-smrd-loads.ll
  llvm/trunk/test/CodeGen/Hexagon/subi-asl.ll
  llvm/trunk/test/CodeGen/X86/scheduler-backtracking.ll
  llvm/trunk/test/CodeGen/X86/signbit-shift.ll
  llvm/trunk/test/CodeGen/X86/split-store.ll

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