[PATCH] D60550: [X86] Enable AVX512_BF16 instructions, which are supported for BFLOAT16 in Cooper Lake
Tianle Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 22 18:48:55 PDT 2019
liutianle updated this revision to Diff 196166.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D60550/new/
https://reviews.llvm.org/D60550
Files:
include/llvm/IR/IntrinsicsX86.td
lib/Support/Host.cpp
lib/Target/X86/X86.td
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrInfo.td
lib/Target/X86/X86IntrinsicsInfo.h
lib/Target/X86/X86Subtarget.h
test/CodeGen/X86/avx512bf16-intrinsics.ll
test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
test/MC/Disassembler/X86/avx512bf16-att.txt
test/MC/Disassembler/X86/avx512bf16-intel.txt
test/MC/Disassembler/X86/avx512bf16vl-att.txt
test/MC/Disassembler/X86/avx512bf16vl-intel.txt
test/MC/Disassembler/X86/x86-64-avx512bf16-att.txt
test/MC/Disassembler/X86/x86-64-avx512bf16-intel.txt
test/MC/Disassembler/X86/x86-64-avx512bf16vl-att.txt
test/MC/Disassembler/X86/x86-64-avx512bf16vl-intel.txt
test/MC/X86/avx512_bf16-encoding.s
test/MC/X86/avx512_bf16_vl-encoding.s
test/MC/X86/intel-syntax-avx512_bf16.s
test/MC/X86/intel-syntax-avx512_bf16_vl.s
test/MC/X86/intel-syntax-x86-64-avx512_bf16.s
test/MC/X86/intel-syntax-x86-64-avx512_bf16_vl.s
test/MC/X86/x86-64-avx512_bf16-encoding.s
test/MC/X86/x86-64-avx512_bf16_vl-encoding.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D60550.196166.patch
Type: text/x-patch
Size: 128033 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190423/588d86b3/attachment-0001.bin>
More information about the llvm-commits
mailing list