[PATCH] D59422: [SelectionDAG] Use SimplifyDemandedBits on truncated SCALAR_TO_VECTORs
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 22 06:54:22 PDT 2019
RKSimon added a reviewer: spatel.
RKSimon marked an inline comment as done.
RKSimon added a subscriber: spatel.
RKSimon added inline comments.
================
Comment at: test/CodeGen/AArch64/arm64-build-vector.ll:28
; CHECK-NEXT: mov w8, #44672
-; CHECK-NEXT: fmov s1, w8
+; CHECK-NEXT: dup.8h v1, w8
; CHECK-NEXT: mul.8h v0, v0, v1
----------------
efriedma wrote:
> This is in fact a regression, at least on some targets; on an A57, it has higher latency and uses an extra execution unit.
>
> I'm guessing there's some issue with the priority between splat vs. zeroing in the case where the high elements are all undef?
Adding @spatel who I think hit some similar issue with splat vector vs scalarization combines recently
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rL LLVM
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https://reviews.llvm.org/D59422/new/
https://reviews.llvm.org/D59422
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