[PATCH] D60958: [PPC64] toc-indirect to toc-relative relaxation
Rui Ueyama via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 22 03:16:31 PDT 2019
ruiu added inline comments.
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Comment at: ELF/Arch/PPC64.cpp:114-115
+ ArrayRef<typename ELFT::Rela> Relas = TocSec->template relas<ELFT>();
+ while (TocRelIdx < Relas.size() && Relas[TocRelIdx].r_offset < Offset)
+ ++TocRelIdx;
+ if (!(TocRelIdx < Relas.size() && Relas[TocRelIdx].r_offset == Offset))
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How fast is this statement? Don't you have to do binary search?
================
Comment at: ELF/Arch/PPC64.cpp:122-125
+// Loading a symbol address from .toc (e.g. "addis r,2,foo at toc@ha;
+// ld r,foo at toc@l(r)") can be relaxed to compute the address using an offset
+// relative to the toc pointer (e.g. "addis r,2,offset; addi r,r,offset" or
+// "nop; addi r,2,offset").
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I'm not familiar with the PPC64 instruction set, and I'm wondering why the relaxed instructions are faster than the original form. Can you add that to the comment?
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Comment at: ELF/Relocations.cpp:1251
});
+ else if (Config->EMachine == EM_PPC64) {
+ // Sort .toc relocations by offset and R_PPC64_RELAX_TOC relocations by
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nit: please add `}`.
Repository:
rLLD LLVM Linker
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https://reviews.llvm.org/D60958/new/
https://reviews.llvm.org/D60958
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