[llvm] r358743 - [PATCH] [MachineScheduler] Check pending instructions when an instruction is scheduled

[James Molloy via llvm-commits]

Author: jamesm
Date: Fri Apr 19 02:00:55 2019
New Revision: 358743

URL: http://llvm.org/viewvc/llvm-project?rev=358743&view=rev
Log:
[PATCH] [MachineScheduler] Check pending instructions when an instruction is scheduled

Pending instructions that may have been blocked from being available by the HazardRecognizer may no longer may not be blocked any more when an instruction is scheduled; pending instructions should be re-checked in this case.

This is primarily aimed at VLIW targets with large parallelism and esoteric constraints.

No testcase as no in-tree targets have this behavior.

Differential revision: https://reviews.llvm.org/D60861

Modified:
    llvm/trunk/lib/CodeGen/MachineScheduler.cpp

Modified: llvm/trunk/lib/CodeGen/MachineScheduler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineScheduler.cpp?rev=358743&r1=358742&r2=358743&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineScheduler.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineScheduler.cpp Fri Apr 19 02:00:55 2019
@@ -2159,6 +2159,8 @@ void SchedBoundary::bumpNode(SUnit *SU)
       HazardRec->Reset();
     }
     HazardRec->EmitInstruction(SU);
+    // Scheduling an instruction may have made pending instructions available.
+    CheckPending = true;
   }
   // checkHazard should prevent scheduling multiple instructions per cycle that
   // exceed the issue width.