[PATCH] D60861: [MachineScheduler] Check pending instructions when an instruction is scheduled

[James Molloy via Phabricator via llvm-commits]

jmolloy created this revision.
jmolloy added a reviewer: atrick.
Herald added subscribers: llvm-commits, javed.absar, MatzeB.
Herald added a project: LLVM.

Pending instructions that may have been blocked from being available by the HazardRecognizer may no longer may not be blocked any more when an instruction is scheduled; pending instructions should be re-checked in this case.

No testcase as no in-tree targets have this behavior and the CheckPending behavior (AFAICT) is intended only for compile performance, not correctness.


Repository:
  rL LLVM

https://reviews.llvm.org/D60861

Files:
  lib/CodeGen/MachineScheduler.cpp


Index: lib/CodeGen/MachineScheduler.cpp
===================================================================
--- lib/CodeGen/MachineScheduler.cpp
+++ lib/CodeGen/MachineScheduler.cpp
@@ -2159,6 +2159,8 @@
       HazardRec->Reset();
     }
     HazardRec->EmitInstruction(SU);
+    // Scheduling an instruction may have made pending instructions available.
+    CheckPending = true;
   }
   // checkHazard should prevent scheduling multiple instructions per cycle that
   // exceed the issue width.


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