[PATCH] D60694: [ARM] Introduce separate features for FP registers.

[Simon Tatham via Phabricator via llvm-commits]

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Comment at: llvm/lib/Target/ARM/ARMInstrVFP.td:2357
  let Defs = [FPSCR] in {
+   let Predicates = [HasFPRegs] in
    // Application level GPR -> FPSCR
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ostannard wrote:
> This only applies to VMSR at the moment, should it also cover the other four?
Errrr. That's rather difficult to say.

The idea of the FP registers existing without FP has never come up before: the combination of v8.1-M and MVE is the first case where it's possible, which is why we haven't had to add this separate feature name before.

But according to the v8.1-M ArmARM, none of those four registers exists anyway in v8.1-M, with or without FP. FPEXC and FPINST[2] are for support code, which the modern fashion is to avoid needing anyway; FPSID could make sense in principle, but in fact it's never existed in the M profile as far as I can see.

So I think the answer is that no current version of the Arm architecture gives evidence for or against your question!


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https://reviews.llvm.org/D60694