[PATCH] D60708: [ARM] Code-generation infrastructure for MVE.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham marked an inline comment as done.
simon_tatham added a comment.

This infrastructure should be enough to let you use the vector types in C as a means of getting them to and from `__asm__` blocks that do the real work. I suppose that means I should include some tests that exercise exactly that, using asm operations in IR.



================
Comment at: llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp:206
     unsigned PredReg = 0;
-    ARMCC::CondCodes CC = getITInstrPredicate(*MI, PredReg);
-    if (CC == ARMCC::AL) {
-      ++MBBI;
-      continue;
-    }
+    ARMCC::CondCodes CC;
+
----------------
ostannard wrote:
> Does anything generate VPT-predicated instructions yet? If not, this should probably be split into a separate patch.
You have a point – predicated instructions won't be generated by anything I can think of in this patch series, and if you put one in an `__asm__` block then it won't be represented in a way that this phase will notice.

So yes, perhaps I should back out this part of the patch until the ACLE intrinsics implementation is ready for review.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D60708