[llvm] r358432 - [x86] update test checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 15 10:38:47 PDT 2019
Author: spatel
Date: Mon Apr 15 10:38:47 2019
New Revision: 358432
URL: http://llvm.org/viewvc/llvm-project?rev=358432&view=rev
Log:
[x86] update test checks; NFC
Modified:
llvm/trunk/test/CodeGen/X86/lea-2.ll
llvm/trunk/test/CodeGen/X86/lea-3.ll
llvm/trunk/test/CodeGen/X86/lea-4.ll
Modified: llvm/trunk/test/CodeGen/X86/lea-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-2.ll?rev=358432&r1=358431&r2=358432&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea-2.ll Mon Apr 15 10:38:47 2019
@@ -1,18 +1,29 @@
-; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux -x86-asm-syntax=intel | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -x86-asm-syntax=intel | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-nacl -x86-asm-syntax=intel | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefix=X64
-define i32 @test1(i32 %A, i32 %B) {
- %tmp1 = shl i32 %A, 2
- %tmp3 = add i32 %B, -5
- %tmp4 = add i32 %tmp3, %tmp1
-; The above computation of %tmp4 should match a single lea, without using
-; actual add instructions.
-; CHECK-NOT: add
-; CHECK: lea {{[a-z]+}}, [{{[a-z]+}} + 4*{{[a-z]+}} - 5]
+; The computation of %t4 should match a single lea, without using actual add instructions.
- ret i32 %tmp4
+define i32 @test1(i32 %A, i32 %B) {
+; X32-LABEL: test1:
+; X32: # %bb.0:
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: leal -5(%ecx,%eax,4), %eax
+; X32-NEXT: retl
+;
+; X64-LABEL: test1:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal -5(%rsi,%rdi,4), %eax
+; X64-NEXT: retq
+ %t1 = shl i32 %A, 2
+ %t3 = add i32 %B, -5
+ %t4 = add i32 %t3, %t1
+ ret i32 %t4
}
Modified: llvm/trunk/test/CodeGen/X86/lea-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-3.ll?rev=358432&r1=358431&r2=358432&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea-3.ll Mon Apr 15 10:38:47 2019
@@ -1,86 +1,52 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=LNX1
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=LNX2
-; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefix=NACL
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=CHECK,LNX
+; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefixes=CHECK,LNX32
+; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefixes=CHECK,NACL
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefixes=WIN32
define i64 @test2(i64 %a) {
-; LNX1-LABEL: test2:
-; LNX1: # %bb.0:
-; LNX1-NEXT: leaq (,%rdi,4), %rax
-; LNX1-NEXT: orq %rdi, %rax
-; LNX1-NEXT: retq
-;
-; LNX2-LABEL: test2:
-; LNX2: # %bb.0:
-; LNX2-NEXT: leaq (,%rdi,4), %rax
-; LNX2-NEXT: orq %rdi, %rax
-; LNX2-NEXT: retq
-;
-; NACL-LABEL: test2:
-; NACL: # %bb.0:
-; NACL-NEXT: leaq (,%rdi,4), %rax
-; NACL-NEXT: orq %rdi, %rax
-; NACL-NEXT: retq
-;
-; WIN-LABEL: test2:
-; WIN: # %bb.0:
-; WIN-NEXT: leaq (,%rcx,4), %rax
-; WIN-NEXT: orq %rcx, %rax
-; WIN-NEXT: retq
+; CHECK-LABEL: test2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: leaq (,%rdi,4), %rax
+; CHECK-NEXT: orq %rdi, %rax
+; CHECK-NEXT: retq
+;
+; WIN32-LABEL: test2:
+; WIN32: # %bb.0:
+; WIN32-NEXT: leaq (,%rcx,4), %rax
+; WIN32-NEXT: orq %rcx, %rax
+; WIN32-NEXT: retq
%tmp2 = shl i64 %a, 2
%tmp3 = or i64 %tmp2, %a
ret i64 %tmp3
}
define i32 @test(i32 %a) {
-; LNX1-LABEL: test:
-; LNX1: # %bb.0:
-; LNX1-NEXT: # kill: def $edi killed $edi def $rdi
-; LNX1-NEXT: leal (%rdi,%rdi,2), %eax
-; LNX1-NEXT: retq
-;
-; LNX2-LABEL: test:
-; LNX2: # %bb.0:
-; LNX2-NEXT: # kill: def $edi killed $edi def $rdi
-; LNX2-NEXT: leal (%rdi,%rdi,2), %eax
-; LNX2-NEXT: retq
-;
-; NACL-LABEL: test:
-; NACL: # %bb.0:
-; NACL-NEXT: # kill: def $edi killed $edi def $rdi
-; NACL-NEXT: leal (%rdi,%rdi,2), %eax
-; NACL-NEXT: retq
-;
-; WIN-LABEL: test:
-; WIN: # %bb.0:
-; WIN-NEXT: # kill: def $ecx killed $ecx def $rcx
-; WIN-NEXT: leal (%rcx,%rcx,2), %eax
-; WIN-NEXT: retq
+; CHECK-LABEL: test:
+; CHECK: # %bb.0:
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal (%rdi,%rdi,2), %eax
+; CHECK-NEXT: retq
+;
+; WIN32-LABEL: test:
+; WIN32: # %bb.0:
+; WIN32-NEXT: # kill: def $ecx killed $ecx def $rcx
+; WIN32-NEXT: leal (%rcx,%rcx,2), %eax
+; WIN32-NEXT: retq
%tmp2 = mul i32 %a, 3
ret i32 %tmp2
}
define i64 @test3(i64 %a) {
-; LNX1-LABEL: test3:
-; LNX1: # %bb.0:
-; LNX1-NEXT: leaq (,%rdi,8), %rax
-; LNX1-NEXT: retq
-;
-; LNX2-LABEL: test3:
-; LNX2: # %bb.0:
-; LNX2-NEXT: leaq (,%rdi,8), %rax
-; LNX2-NEXT: retq
-;
-; NACL-LABEL: test3:
-; NACL: # %bb.0:
-; NACL-NEXT: leaq (,%rdi,8), %rax
-; NACL-NEXT: retq
-;
-; WIN-LABEL: test3:
-; WIN: # %bb.0:
-; WIN-NEXT: leaq (,%rcx,8), %rax
-; WIN-NEXT: retq
+; CHECK-LABEL: test3:
+; CHECK: # %bb.0:
+; CHECK-NEXT: leaq (,%rdi,8), %rax
+; CHECK-NEXT: retq
+;
+; WIN32-LABEL: test3:
+; WIN32: # %bb.0:
+; WIN32-NEXT: leaq (,%rcx,8), %rax
+; WIN32-NEXT: retq
%tmp2 = shl i64 %a, 3
ret i64 %tmp2
}
Modified: llvm/trunk/test/CodeGen/X86/lea-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea-4.ll?rev=358432&r1=358431&r2=358432&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea-4.ll Mon Apr 15 10:38:47 2019
@@ -1,24 +1,32 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s
-
+; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s
define zeroext i16 @t1(i32 %on_off) nounwind {
-entry:
- %0 = sub i32 %on_off, 1
- %1 = mul i32 %0, 2
- %2 = trunc i32 %1 to i16
- %3 = zext i16 %2 to i32
- %4 = trunc i32 %3 to i16
-; CHECK: lea
- ret i16 %4
+; CHECK-LABEL: t1:
+; CHECK: # %bb.0:
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal -2(%rdi,%rdi), %eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: retq
+ %t0 = sub i32 %on_off, 1
+ %t1 = mul i32 %t0, 2
+ %t2 = trunc i32 %t1 to i16
+ %t3 = zext i16 %t2 to i32
+ %t4 = trunc i32 %t3 to i16
+ ret i16 %t4
}
define i32 @t2(i32 %on_off) nounwind {
-entry:
- %0 = sub i32 %on_off, 1
- %1 = mul i32 %0, 2
- %2 = and i32 %1, 65535
-; CHECK: lea
- ret i32 %2
+; CHECK-LABEL: t2:
+; CHECK: # %bb.0:
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal -2(%rdi,%rdi), %eax
+; CHECK-NEXT: movzwl %ax, %eax
+; CHECK-NEXT: retq
+ %t0 = sub i32 %on_off, 1
+ %t1 = mul i32 %t0, 2
+ %t2 = and i32 %t1, 65535
+ ret i32 %t2
}
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