[PATCH] D60270: [llvm-objcopy] Add support for Intel HEX input/output format

[Eugene Leviant via Phabricator via llvm-commits]

evgeny777 added a comment.

> btw, some people at euro llvm also requested srec supprt, which seems extremely similar to ihex

For me it doesn't look extremely similar to IHEX, except both formats use hexadecimal byte representation. 
There are no such things as segment and extended addresses in SREC and even checksum calculation is different.

I think if we implement SREC then part of section builder functionality from IHexELFBuilder::addDataSections can be moved to a common base class,
also it seems SREC would have similar record structure (Type, Address, Data).

Still I expect writer and parser to be completely separate.


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  https://reviews.llvm.org/D60270/new/

https://reviews.llvm.org/D60270