[PATCH] D60709: [ARM] Support inline assembler constraints for MVE.
Simon Tatham via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 15 06:01:29 PDT 2019
simon_tatham created this revision.
simon_tatham added reviewers: dmgreen, samparker, SjoerdMeijer.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya, kristof.beyls, eraman, javed.absar.
Herald added projects: clang, LLVM.
"To" selects an odd-numbered GPR, and "Te" an even one. There are some
8.1-M instructions that have one too few bits in their register fields
and require registers of particular parity, without necessarily using
a consecutive even/odd pair.
Also, the constraint letter "t" should select an MVE q-register, when
MVE is present. This didn't need any source changes, but some extra
tests have been added.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D60709
Files:
clang/lib/Basic/Targets/ARM.cpp
clang/test/CodeGen/arm-asm.c
llvm/docs/LangRef.rst
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/inlineasm-error-t-toofewregs-mve.ll
llvm/test/CodeGen/ARM/inlineasm-mve.ll
llvm/test/CodeGen/ARM/inlineasm.ll
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