[PATCH] D60660: [InstCombine] Prune fshl/fshr with masked operands

[Shawn Landden via Phabricator via llvm-commits]

shawnl updated this revision to Diff 195081.
shawnl added a comment.

move up


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60660/new/

https://reviews.llvm.org/D60660

Files:
  lib/Transforms/InstCombine/InstCombineCalls.cpp


Index: lib/Transforms/InstCombine/InstCombineCalls.cpp
===================================================================
--- lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2049,6 +2049,10 @@
     Constant *ShAmtC;
     if (match(II->getArgOperand(2), m_Constant(ShAmtC)) &&
         !isa<ConstantExpr>(ShAmtC) && !ShAmtC->containsConstantExpression()) {
+      // Left or right might be masked
+      if (SimplifyDemandedBits(II))
+        return &CI;
+
       // Canonicalize a shift amount constant operand to modulo the bit-width.
       Constant *WidthC = ConstantInt::get(Ty, BitWidth);
       Constant *ModuloC = ConstantExpr::getURem(ShAmtC, WidthC);


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