[PATCH] D60580: [GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only

[Amara Emerson via Phabricator via llvm-commits]

aemerson updated this revision to Diff 194980.
aemerson added a comment.

New patch uses a new CSEConfigBase class as the interface between TargetPassConfig and GlobalISel targets, since CodeGen can't depend on the GlobalISel lib.

Unfortunately it does mean that targets need to opt-in to CSE.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60580/new/

https://reviews.llvm.org/D60580

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/Mips/MipsTargetMachine.cpp
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-s128-unaligned.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
  llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
  llvm/test/CodeGen/X86/GlobalISel/gep.ll
  llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
  llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
  llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
  llvm/unittests/CodeGen/GlobalISel/CSETest.cpp

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