[PATCH] D60633: [AMDGPU] Avoid DAG combining assert with fneg(fadd(A,0))

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: test/CodeGen/AMDGPU/assert-combine-fneg-fadd-0.ll:8-39
+define amdgpu_ps void @_amdgpu_ps_main(<4 x i32> %arg) local_unnamed_addr {
+.entry:
+  %tmp = tail call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %arg, i32 224, i32 0)
+  %tmp1 = bitcast i32 %tmp to float
+  %tmp2 = tail call float @llvm.maxnum.f32(float %tmp1, float 0.000000e+00)
+  %tmp3 = tail call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %arg, i32 144, i32 0)
+  %tmp4 = bitcast i32 %tmp3 to float
----------------
I can usually go a lot further than bug point, especially once I know what the actual problem is. This is also going to only hit one of the cases you added here.

The test cases should also go in the existing file for these combines


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60633/new/

https://reviews.llvm.org/D60633