[llvm] r358277 - Use llvm::upper_bound. NFC

[Fangrui Song via llvm-commits]

Author: maskray
Date: Fri Apr 12 04:31:16 2019
New Revision: 358277

URL: http://llvm.org/viewvc/llvm-project?rev=358277&view=rev
Log:
Use llvm::upper_bound. NFC

Modified:
    llvm/trunk/lib/CodeGen/ExecutionDomainFix.cpp
    llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
    llvm/trunk/lib/CodeGen/LiveInterval.cpp
    llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp

Modified: llvm/trunk/lib/CodeGen/ExecutionDomainFix.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ExecutionDomainFix.cpp?rev=358277&r1=358276&r2=358277&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ExecutionDomainFix.cpp (original)
+++ llvm/trunk/lib/CodeGen/ExecutionDomainFix.cpp Fri Apr 12 04:31:16 2019
@@ -336,11 +336,10 @@ void ExecutionDomainFix::visitSoftInstr(
     }
     // Sorted insertion.
     // Enables giving priority to the latest domains during merging.
-    auto I = std::upper_bound(
-        Regs.begin(), Regs.end(), rx, [&](int LHS, const int RHS) {
-          return RDA->getReachingDef(mi, RC->getRegister(LHS)) <
-                 RDA->getReachingDef(mi, RC->getRegister(RHS));
-        });
+    auto I = llvm::upper_bound(Regs, rx, [&](int LHS, const int RHS) {
+      return RDA->getReachingDef(mi, RC->getRegister(LHS)) <
+             RDA->getReachingDef(mi, RC->getRegister(RHS));
+    });
     Regs.insert(I, rx);
   }
 

Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp?rev=358277&r1=358276&r2=358277&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp Fri Apr 12 04:31:16 2019
@@ -506,9 +506,8 @@ LegalizerInfo::findAction(const SizeAndA
   // Find the last element in Vec that has a bitsize equal to or smaller than
   // the requested bit size.
   // That is the element just before the first element that is bigger than Size.
-  auto VecIt = std::upper_bound(
-      Vec.begin(), Vec.end(), Size,
-      [](const uint32_t Size, const SizeAndAction lhs) -> bool {
+  auto VecIt = llvm::upper_bound(
+      Vec, Size, [](const uint32_t Size, const SizeAndAction lhs) -> bool {
         return Size < lhs.first;
       });
   assert(VecIt != Vec.begin() && "Does Vec not start with size 1?");

Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=358277&r1=358276&r2=358277&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Fri Apr 12 04:31:16 2019
@@ -296,9 +296,7 @@ private:
 
   iterator find(SlotIndex Pos) { return LR->find(Pos); }
 
-  iterator findInsertPos(Segment S) {
-    return std::upper_bound(LR->begin(), LR->end(), S.start);
-  }
+  iterator findInsertPos(Segment S) { return llvm::upper_bound(*LR, S.start); }
 };
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=358277&r1=358276&r2=358277&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Fri Apr 12 04:31:16 2019
@@ -693,8 +693,7 @@ bool RegisterCoalescer::hasOtherReaching
 
   for (LiveRange::Segment &ASeg : IntA.segments) {
     if (ASeg.valno != AValNo) continue;
-    LiveInterval::iterator BI =
-      std::upper_bound(IntB.begin(), IntB.end(), ASeg.start);
+    LiveInterval::iterator BI = llvm::upper_bound(IntB, ASeg.start);
     if (BI != IntB.begin())
       --BI;
     for (; BI != IntB.end() && ASeg.end >= BI->start; ++BI) {