[llvm] r358271 - [PowerPC] Add initialization for some ppc passes
Kang Zhang via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 12 02:59:40 PDT 2019
Author: zhangkang
Date: Fri Apr 12 02:59:40 2019
New Revision: 358271
URL: http://llvm.org/viewvc/llvm-project?rev=358271&view=rev
Log:
[PowerPC] Add initialization for some ppc passes
Summary:
Some llc debug options need pass-name as the parameters.
But if we use the pass-name ppc-early-ret, we will get below error:
llc test.ll -stop-after ppc-early-ret
LLVM ERROR: "ppc-early-ret" pass is not registered.
Below pass-names have the pass is not registered error:
ppc-ctr-loops
ppc-ctr-loops-verify
ppc-loop-preinc-prep
ppc-toc-reg-deps
ppc-vsx-copy
ppc-early-ret
ppc-vsx-fma-mutate
ppc-vsx-swaps
ppc-reduce-cr-ops
ppc-qpx-load-splat
ppc-branch-coalescing
ppc-branch-select
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D60248
Added:
llvm/trunk/test/CodeGen/PowerPC/ppc-passname-assert.ll
llvm/trunk/test/CodeGen/PowerPC/ppc-passname.ll
Modified:
llvm/trunk/lib/Target/PowerPC/PPC.h
llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp
llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp
llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp
llvm/trunk/lib/Target/PowerPC/PPCEarlyReturn.cpp
llvm/trunk/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp
llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
llvm/trunk/lib/Target/PowerPC/PPCTOCRegDeps.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCVSXCopy.cpp
llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPC.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPC.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPC.h Fri Apr 12 02:59:40 2019
@@ -56,12 +56,26 @@ namespace llvm {
MCOperand &OutMO, AsmPrinter &AP,
bool isDarwin);
+ void initializePPCCTRLoopsPass(PassRegistry&);
+#ifndef NDEBUG
+ void initializePPCCTRLoopsVerifyPass(PassRegistry&);
+#endif
+ void initializePPCLoopPreIncPrepPass(PassRegistry&);
+ void initializePPCTOCRegDepsPass(PassRegistry&);
+ void initializePPCEarlyReturnPass(PassRegistry&);
+ void initializePPCVSXCopyPass(PassRegistry&);
void initializePPCVSXFMAMutatePass(PassRegistry&);
+ void initializePPCVSXSwapRemovalPass(PassRegistry&);
+ void initializePPCReduceCRLogicalsPass(PassRegistry&);
+ void initializePPCBSelPass(PassRegistry&);
+ void initializePPCBranchCoalescingPass(PassRegistry&);
+ void initializePPCQPXLoadSplatPass(PassRegistry&);
void initializePPCBoolRetToIntPass(PassRegistry&);
void initializePPCExpandISELPass(PassRegistry &);
void initializePPCPreEmitPeepholePass(PassRegistry &);
void initializePPCTLSDynamicCallPass(PassRegistry &);
void initializePPCMIPeepholePass(PassRegistry&);
+
extern char &PPCVSXFMAMutateID;
namespace PPCII {
Modified: llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp Fri Apr 12 02:59:40 2019
@@ -33,10 +33,6 @@ STATISTIC(NumBlocksCoalesced, "Number of
STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
-namespace llvm {
- void initializePPCBranchCoalescingPass(PassRegistry&);
-}
-
//===----------------------------------------------------------------------===//
// PPCBranchCoalescing
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp Fri Apr 12 02:59:40 2019
@@ -32,10 +32,6 @@ using namespace llvm;
STATISTIC(NumExpanded, "Number of branches expanded to long format");
-namespace llvm {
- void initializePPCBSelPass(PassRegistry&);
-}
-
namespace {
struct PPCBSel : public MachineFunctionPass {
static char ID;
Modified: llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCCTRLoops.cpp Fri Apr 12 02:59:40 2019
@@ -80,13 +80,6 @@ SmallCTRLoopThreshold("min-ctr-loop-thre
STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
-namespace llvm {
- void initializePPCCTRLoopsPass(PassRegistry&);
-#ifndef NDEBUG
- void initializePPCCTRLoopsVerifyPass(PassRegistry&);
-#endif
-}
-
namespace {
struct PPCCTRLoops : public FunctionPass {
Modified: llvm/trunk/lib/Target/PowerPC/PPCEarlyReturn.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCEarlyReturn.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCEarlyReturn.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCEarlyReturn.cpp Fri Apr 12 02:59:40 2019
@@ -36,10 +36,6 @@ using namespace llvm;
STATISTIC(NumBCLR, "Number of early conditional returns");
STATISTIC(NumBLR, "Number of early returns");
-namespace llvm {
- void initializePPCEarlyReturnPass(PassRegistry&);
-}
-
namespace {
// PPCEarlyReturn pass - For simple functions without epilogue code, move
// returns up, and create conditional returns, to avoid unnecessary
Modified: llvm/trunk/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp Fri Apr 12 02:59:40 2019
@@ -64,12 +64,6 @@ static cl::opt<unsigned> MaxVars("ppc-pr
STATISTIC(PHINodeAlreadyExists, "PHI node already in pre-increment form");
-namespace llvm {
-
- void initializePPCLoopPreIncPrepPass(PassRegistry&);
-
-} // end namespace llvm
-
namespace {
class PPCLoopPreIncPrep : public FunctionPass {
Modified: llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp Fri Apr 12 02:59:40 2019
@@ -30,10 +30,6 @@ using namespace llvm;
STATISTIC(NumSimplified, "Number of QPX load splats simplified");
-namespace llvm {
- void initializePPCQPXLoadSplatPass(PassRegistry&);
-}
-
namespace {
struct PPCQPXLoadSplat : public MachineFunctionPass {
static char ID;
Modified: llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cpp Fri Apr 12 02:59:40 2019
@@ -48,10 +48,6 @@ STATISTIC(NumNotSplitChainCopies,
STATISTIC(NumNotSplitWrongOpcode,
"Number of blocks not split due to the wrong opcode.");
-namespace llvm {
- void initializePPCReduceCRLogicalsPass(PassRegistry&);
-}
-
/// Given a basic block \p Successor that potentially contains PHIs, this
/// function will look for any incoming values in the PHIs that are supposed to
/// be coming from \p OrigMBB but whose definition is actually in \p NewMBB.
Modified: llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTLSDynamicCall.cpp Fri Apr 12 02:59:40 2019
@@ -34,10 +34,6 @@ using namespace llvm;
#define DEBUG_TYPE "ppc-tls-dynamic-call"
-namespace llvm {
- void initializePPCTLSDynamicCallPass(PassRegistry&);
-}
-
namespace {
struct PPCTLSDynamicCall : public MachineFunctionPass {
static char ID;
Modified: llvm/trunk/lib/Target/PowerPC/PPCTOCRegDeps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTOCRegDeps.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTOCRegDeps.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTOCRegDeps.cpp Fri Apr 12 02:59:40 2019
@@ -82,10 +82,6 @@ using namespace llvm;
#define DEBUG_TYPE "ppc-toc-reg-deps"
-namespace llvm {
- void initializePPCTOCRegDepsPass(PassRegistry&);
-}
-
namespace {
// PPCTOCRegDeps pass - For simple functions without epilogue code, move
// returns up, and create conditional returns, to avoid unnecessary
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Fri Apr 12 02:59:40 2019
@@ -100,6 +100,20 @@ extern "C" void LLVMInitializePowerPCTar
RegisterTargetMachine<PPCTargetMachine> C(getThePPC64LETarget());
PassRegistry &PR = *PassRegistry::getPassRegistry();
+ initializePPCCTRLoopsPass(PR);
+#ifndef NDEBUG
+ initializePPCCTRLoopsVerifyPass(PR);
+#endif
+ initializePPCLoopPreIncPrepPass(PR);
+ initializePPCTOCRegDepsPass(PR);
+ initializePPCEarlyReturnPass(PR);
+ initializePPCVSXCopyPass(PR);
+ initializePPCVSXFMAMutatePass(PR);
+ initializePPCVSXSwapRemovalPass(PR);
+ initializePPCReduceCRLogicalsPass(PR);
+ initializePPCBSelPass(PR);
+ initializePPCBranchCoalescingPass(PR);
+ initializePPCQPXLoadSplatPass(PR);
initializePPCBoolRetToIntPass(PR);
initializePPCExpandISELPass(PR);
initializePPCPreEmitPeepholePass(PR);
Modified: llvm/trunk/lib/Target/PowerPC/PPCVSXCopy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCVSXCopy.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCVSXCopy.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCVSXCopy.cpp Fri Apr 12 02:59:40 2019
@@ -36,10 +36,6 @@ using namespace llvm;
#define DEBUG_TYPE "ppc-vsx-copy"
-namespace llvm {
- void initializePPCVSXCopyPass(PassRegistry&);
-}
-
namespace {
// PPCVSXCopy pass - For copies between VSX registers and non-VSX registers
// (Altivec and scalar floating-point registers), we need to transform the
Modified: llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp?rev=358271&r1=358270&r2=358271&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp Fri Apr 12 02:59:40 2019
@@ -59,10 +59,6 @@ using namespace llvm;
#define DEBUG_TYPE "ppc-vsx-swaps"
-namespace llvm {
- void initializePPCVSXSwapRemovalPass(PassRegistry&);
-}
-
namespace {
// A PPCVSXSwapEntry is created for each machine instruction that
Added: llvm/trunk/test/CodeGen/PowerPC/ppc-passname-assert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-passname-assert.ll?rev=358271&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-passname-assert.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-passname-assert.ll Fri Apr 12 02:59:40 2019
@@ -0,0 +1,12 @@
+; REQUIRES: asserts
+
+; Test pass name: ppc-ctr-loops-verify.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-ctr-loops-verify -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-CTR-LOOPS-VERIFY
+; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: -ppc-ctr-loops-verify
+; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: "ppc-ctr-loops-verify" pass is not registered.
+; STOP-BEFORE-CTR-LOOPS-VERIFY-NOT: PowerPC CTR Loops Verify
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-ctr-loops-verify -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-CTR-LOOPS-VERIFY
+; STOP-AFTER-CTR-LOOPS-VERIFY: -ppc-ctr-loops-verify
+; STOP-AFTER-CTR-LOOPS-VERIFY-NOT: "ppc-ctr-loops-verify" pass is not registered.
+; STOP-AFTER-CTR-LOOPS-VERIFY: PowerPC CTR Loops Verify
Added: llvm/trunk/test/CodeGen/PowerPC/ppc-passname.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-passname.ll?rev=358271&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc-passname.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc-passname.ll Fri Apr 12 02:59:40 2019
@@ -0,0 +1,130 @@
+; Test pass name: ppc-ctr-loops.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-ctr-loops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-CTR-LOOPS
+; STOP-BEFORE-CTR-LOOPS-NOT: -ppc-ctr-loops
+; STOP-BEFORE-CTR-LOOPS-NOT: "ppc-ctr-loops" pass is not registered.
+; STOP-BEFORE-CTR-LOOPS-NOT: PowerPC CTR Loops
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-ctr-loops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-CTR-LOOPS
+; STOP-AFTER-CTR-LOOPS: -ppc-ctr-loops
+; STOP-AFTER-CTR-LOOPS-NOT: "ppc-ctr-loops" pass is not registered.
+; STOP-AFTER-CTR-LOOPS: PowerPC CTR Loops
+
+
+; Test pass name: ppc-loop-preinc-prep.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-LOOP-PREINC-PREP
+; STOP-BEFORE-LOOP-PREINC-PREP-NOT: -ppc-loop-preinc-prep
+; STOP-BEFORE-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered.
+; STOP-BEFORE-LOOP-PREINC-PREP-NOT: Prepare loop for pre-inc. addressing modes
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-LOOP-PREINC-PREP
+; STOP-AFTER-LOOP-PREINC-PREP: -ppc-loop-preinc-prep
+; STOP-AFTER-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered.
+; STOP-AFTER-LOOP-PREINC-PREP: Prepare loop for pre-inc. addressing modes
+
+
+; Test pass name: ppc-toc-reg-deps.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-toc-reg-deps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-TOC-REG-DEPS
+; STOP-BEFORE-TOC-REG-DEPS-NOT: -ppc-toc-reg-deps
+; STOP-BEFORE-TOC-REG-DEPS-NOT: "ppc-toc-reg-deps" pass is not registered.
+; STOP-BEFORE-TOC-REG-DEPS-NOT: PowerPC TOC Register Dependencies
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-toc-reg-deps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-TOC-REG-DEPS
+; STOP-AFTER-TOC-REG-DEPS: -ppc-toc-reg-deps
+; STOP-AFTER-TOC-REG-DEPS-NOT: "ppc-toc-reg-deps" pass is not registered.
+; STOP-AFTER-TOC-REG-DEPS: PowerPC TOC Register Dependencies
+
+
+; Test pass name: ppc-vsx-copy.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-copy -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-COPY
+; STOP-BEFORE-VSX-COPY-NOT: -ppc-vsx-copy
+; STOP-BEFORE-VSX-COPY-NOT: "ppc-vsx-copy" pass is not registered.
+; STOP-BEFORE-VSX-COPY-NOT: PowerPC VSX Copy Legalization
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-copy -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-COPY
+; STOP-AFTER-VSX-COPY: -ppc-vsx-copy
+; STOP-AFTER-VSX-COPY-NOT: "ppc-vsx-copy" pass is not registered.
+; STOP-AFTER-VSX-COPY: PowerPC VSX Copy Legalization
+
+
+; Test pass name: ppc-early-ret.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-early-ret -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-EARLY-RET
+; STOP-BEFORE-EARLY-RET-NOT: -ppc-early-ret
+; STOP-BEFORE-EARLY-RET-NOT: "ppc-early-ret" pass is not registered.
+; STOP-BEFORE-EARLY-RET-NOT: PowerPC Early-Return Creation
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-early-ret -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-EARLY-RET
+; STOP-AFTER-EARLY-RET: -ppc-early-ret
+; STOP-AFTER-ERALY-RET-NOT: "ppc-early-ret" pass is not registered.
+; STOP-AFTER-EARLY-RET: PowerPC Early-Return Creation
+
+
+; Test pass name: ppc-vsx-fma-mutate.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-fma-mutate -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-FMA-MUTATE
+; STOP-BEFORE-VSX-FMA-MUTATE-NOT: -ppc-vsx-fma-mutate
+; STOP-BEFORE-VSX-FMA-MUTATE-NOT: "ppc-vsx-fma-mutate" pass is not registered.
+; STOP-BEFORE-VSX-FMA-MUTATE-NOT: PowerPC VSX FMA Mutation
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-fma-mutate -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-FMA-MUTATE
+; STOP-AFTER-VSX-FMA-MUTATE: -ppc-vsx-fma-mutate
+; STOP-AFTER-VSX-FMA-MUTATE-NOT: "ppc-vsx-fma-mutate" pass is not registered.
+; STOP-AFTER-VSX-FMA-MUTATE: PowerPC VSX FMA Mutation
+
+
+; Test pass name: ppc-vsx-swaps.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-vsx-swaps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-VSX-SWAPS
+; STOP-BEFORE-VSX-SWAPS-NOT: -ppc-vsx-swaps
+; STOP-BEFORE-VSX-SWAPS-NOT: "ppc-vsx-swaps" pass is not registered.
+; STOP-BEFORE-VSX-SWAPS-NOT: PowerPC VSX Swap Removal
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-vsx-swaps -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-VSX-SWAPS
+; STOP-AFTER-VSX-SWAPS: -ppc-vsx-swaps
+; STOP-AFTER-VSX-SWAPS-NOT: "ppc-vsx-swaps" pass is not registered.
+; STOP-AFTER-VSX-SWAPS: PowerPC VSX Swap Removal
+
+
+; Test pass name: ppc-reduce-cr-ops.
+; RUN: llc -ppc-reduce-cr-logicals -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-reduce-cr-ops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-REDUCE-CR-OPS
+; STOP-BEFORE-REDUCE-CR-OPS-NOT: -ppc-reduce-cr-ops
+; STOP-BEFORE-REDUCE-CR-OPS-NOT: "ppc-reduce-cr-ops" pass is not registered.
+; STOP-BEFORE-REDUCE-CR-OPS-NOT: PowerPC Reduce CR logical Operation
+
+; RUN: llc -ppc-reduce-cr-logicals -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-reduce-cr-ops -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-REDUCE-CR-OPS
+; STOP-AFTER-REDUCE-CR-OPS: -ppc-reduce-cr-ops
+; STOP-AFTER-REDUCE-CR-OPS-NOT: "ppc-reduce-cr-ops" pass is not registered.
+; STOP-AFTER-REDUCE-CR-OPS: PowerPC Reduce CR logical Operation
+
+
+; Test pass name: ppc-branch-select.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-branch-select -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-BRANCH-SELECT
+; STOP-BEFORE-BRANCH-SELECT-NOT: -ppc-branch-select
+; STOP-BEFORE-BRANCH-SELECT-NOT: "ppc-branch-select" pass is not registered.
+; STOP-BEFORE-BRANCH-SELECT-NOT: PowerPC Branch Selector
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-branch-select -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-BRANCH-SELECT
+; STOP-AFTER-BRANCH-SELECT: -ppc-branch-select
+; STOP-AFTER-BRANCH-SELECT-NOT: "ppc-branch-select" pass is not registered.
+; STOP-AFTER-BRANCH-SELECT: PowerPC Branch Selector
+
+
+; Test pass name: ppc-branch-coalescing.
+; RUN: llc -enable-ppc-branch-coalesce -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-branch-coalescing -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-BRANCH-COALESCING
+; STOP-BEFORE-BRANCH-COALESCING-NOT: -ppc-branch-coalescing
+; STOP-BEFORE-BRANCH-COALESCING-NOT: "ppc-branch-coalescing" pass is not registered.
+; STOP-BEFORE-BRANCH-COALESCING-NOT: Branch Coalescing
+
+; RUN: llc -enable-ppc-branch-coalesce -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-branch-coalescing -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-BRANCH-COALESCING
+; STOP-AFTER-BRANCH-COALESCING: -ppc-branch-coalescing
+; STOP-AFTER-BRANCH-COALESCING-NOT: "ppc-branch-coalescing" pass is not registered.
+; STOP-AFTER-BRANCH-COALESCING: Branch Coalescing
+
+
+; Test pass name: ppc-qpx-load-splat.
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-qpx-load-splat -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-QPX-LOAD-SPLAT
+; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: -ppc-qpx-load-splat
+; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: "ppc-qpx-load-splat" pass is not registered.
+; STOP-BEFORE-QPX-LOAD-SPLAT-NOT: PowerPC QPX Load Splat Simplification
+
+; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-qpx-load-splat -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-QPX-LOAD-SPLAT
+; STOP-AFTER-QPX-LOAD-SPLAT: -ppc-qpx-load-splat
+; STOP-AFTER-QPX-LOAD-SPLAT-NOT: "ppc-qpx-load-splat" pass is not registered.
+; STOP-AFTER-QPX-LOAD-SPLAT: PowerPC QPX Load Splat Simplification
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