[llvm] r358186 - [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Apr 11 08:29:15 2019
New Revision: 358186

URL: http://llvm.org/viewvc/llvm-project?rev=358186&view=rev
Log:
[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support

Completes SimplifyDemandedVectorElts's basic variable shuffle mask support which should help D60512 + D60562 

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=358186&r1=358185&r2=358186&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Apr 11 08:29:15 2019
@@ -33234,8 +33234,8 @@ bool X86TargetLowering::SimplifyDemanded
     break;
   }
   case X86ISD::PSHUFB:
+  case X86ISD::VPERMV3:
   case X86ISD::VPERMILPV: {
-    // TODO - simplify other variable shuffle masks.
     SDValue Mask = Op.getOperand(1);
     APInt MaskUndef, MaskZero;
     if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,

Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll?rev=358186&r1=358185&r2=358186&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll Thu Apr 11 08:29:15 2019
@@ -933,10 +933,8 @@ define <8 x double> @combine_vpermi2var_
 ;
 ; X64-LABEL: combine_vpermi2var_8f64_as_permpd:
 ; X64:       # %bb.0:
-; X64-NEXT:    vmovdqa {{.*#+}} xmm2 = <u,2,1,3,4,6,5,7>
-; X64-NEXT:    vpinsrq $0, %rdi, %xmm2, %xmm2
-; X64-NEXT:    vmovdqa64 {{.*#+}} zmm3 = <u,2,1,3,4,6,5,7>
-; X64-NEXT:    vinserti32x4 $0, %xmm2, %zmm3, %zmm2
+; X64-NEXT:    vmovapd {{.*#+}} zmm2 = <u,2,1,3,4,6,5,7>
+; X64-NEXT:    vinsertf32x4 $0, {{.*}}(%rip), %zmm2, %zmm2
 ; X64-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
 ; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X64-NEXT:    retq