[llvm] r358182 - [X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Thu Apr 11 08:09:03 2019
New Revision: 358182

URL: http://llvm.org/viewvc/llvm-project?rev=358182&view=rev
Log:
[X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test

Original test was too dependent on the order of the combines that could cause the inserted element being demanded after all

Modified:
    llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll

Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll?rev=358182&r1=358181&r2=358182&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll Thu Apr 11 08:09:03 2019
@@ -928,7 +928,7 @@ define <8 x double> @combine_vpermi2var_
 ; X86-NEXT:    vinserti128 $1, {{\.LCPI.*}}, %ymm2, %ymm2
 ; X86-NEXT:    vinserti64x4 $1, {{\.LCPI.*}}, %zmm2, %zmm2
 ; X86-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
-; X86-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5]
+; X86-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: combine_vpermi2var_8f64_as_permpd:
@@ -938,11 +938,11 @@ define <8 x double> @combine_vpermi2var_
 ; X64-NEXT:    vmovdqa64 {{.*#+}} zmm3 = <u,2,1,3,4,6,5,7>
 ; X64-NEXT:    vinserti32x4 $0, %xmm2, %zmm3, %zmm2
 ; X64-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
-; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,0,1,6,7,4,5]
+; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X64-NEXT:    retq
   %res0 = insertelement <8 x i64> <i64 0, i64 2, i64 1, i64 3, i64 4, i64 6, i64 5, i64 7>, i64 %a2, i32 0
   %res1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %res0, <8 x double> %x1, i8 -1)
-  %res2 = shufflevector <8 x double> %res1, <8 x double> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 1, i32 6, i32 7, i32 4, i32 5>
+  %res2 = shufflevector <8 x double> %res1, <8 x double> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 1, i32 6, i32 7, i32 5, i32 5>
   ret <8 x double> %res2
 }